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1427abbf6b
The tests for the disassembler were adapted from the encoder tests, and for the most part, the output from the disassembler matches that encoder-test inputs. There are some places where more-informative mnemonics could be produced (notably for the branch instructions), and those cases are noted in the tests with FIXMEs. Future work includes: - Generating more-informative mnemonics when possible (this may also be done in the printer). - Remove the dependence on positional "numbered" operand-to-variable mapping (for both encoding and decoding). - Internally using 64-bit instruction variants in 64-bit mode (if this turns out to matter). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197693 91177308-0d34-0410-b5e6-96231b3b80d8
25 lines
895 B
Makefile
25 lines
895 B
Makefile
##===- lib/Target/PowerPC/Makefile -------------------------*- Makefile -*-===##
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#
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# The LLVM Compiler Infrastructure
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#
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# This file is distributed under the University of Illinois Open Source
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# License. See LICENSE.TXT for details.
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#
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##===----------------------------------------------------------------------===##
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LEVEL = ../../..
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LIBRARYNAME = LLVMPowerPCCodeGen
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TARGET = PPC
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# Make sure that tblgen is run, first thing.
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BUILT_SOURCES = PPCGenRegisterInfo.inc PPCGenAsmMatcher.inc \
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PPCGenAsmWriter.inc PPCGenCodeEmitter.inc \
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PPCGenInstrInfo.inc PPCGenDAGISel.inc \
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PPCGenSubtargetInfo.inc PPCGenCallingConv.inc \
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PPCGenMCCodeEmitter.inc PPCGenFastISel.inc \
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PPCGenDisassemblerTables.inc
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DIRS = AsmParser Disassembler InstPrinter TargetInfo MCTargetDesc
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include $(LEVEL)/Makefile.common
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