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a4e3c7fc4b
Refactor the instructions into fixed writeback and register-stride writeback variants to simplify the offset operand (no more optional register operand using reg0). This is a simpler representation and allows the assembly parser to more easily handle these instructions. Add tests for the instruction variants now supported. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146278 91177308-0d34-0410-b5e6-96231b3b80d8 |
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ARMDisassembler.cpp | ||
CMakeLists.txt | ||
LLVMBuild.txt | ||
Makefile |