Colin LeMahieu 015408c6b1 [Hexagon] Adding encoding information for sign extend word instruction. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224026 91177308-0d34-0410-b5e6-96231b3b80d8

2014-12-11 16:43:06 +00:00

..

AArch64

Update AArch64 ELF relocations to ABI 1.0

2014-11-26 10:49:18 +00:00

ARM

Fix modified immediate bug reported by MC Hammer.

2014-12-09 13:14:58 +00:00

AsmParser

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COFF

IR: Canonicalize metadata formatting, NFC

2014-12-11 06:32:29 +00:00

Disassembler

[Hexagon] Adding encoding information for sign extend word instruction.

2014-12-11 16:43:06 +00:00

ELF

Commit back the correct bits of r222760 (was r222538).

2014-11-27 17:13:56 +00:00

Hexagon

[Hexagon] Updating predicate register transfers and adding tstbit to allow select selection. Updating ll tests with predicate transfers that previously had nop encodings.

2014-12-09 18:16:49 +00:00

MachO

IR: Canonicalize metadata formatting, NFC

2014-12-11 06:32:29 +00:00

Markup

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Mips

The andi16, addiusp and jraddiusp micromips instructions were missing dedicated decoder methods in MipsDisassembler.cpp to properly decode immediate operands. These methods are added together with corresponding tests.

2014-12-01 11:12:04 +00:00

PowerPC

[PowerPC] Add asm support for cache-inhibited ld/st instructions

2014-11-30 10:15:56 +00:00

R600

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Sparc

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SystemZ

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X86

[AVX512] Added VPBROADCAST{BWDQ} (Load with Broadcast Integer Data from General Purpose Register) encodings for AVX512-BW/VL subsets

2014-12-09 16:38:41 +00:00