llvm-6502/test/MC/Mips/mips64r6
Daniel Sanders 817cbdeae6 [mips] Add COP0 register class and use it in M[FT]C0/DM[FT]C0.
Summary:
Previously it (incorrectly) used GPR's.

Patch by Simon Dardis. A couple small corrections by myself.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10567


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240883 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-27 15:39:19 +00:00
..
invalid-mips1-wrong-error.s
invalid-mips1.s
invalid-mips2.s
invalid-mips3-wrong-error.s
invalid-mips3.s
invalid-mips4-wrong-error.s
invalid-mips4.s
invalid-mips5-wrong-error.s
invalid-mips5.s
invalid-mips32-wrong-error.s
invalid-mips64.s
invalid.s
relocations.s
valid-xfail.s
valid.s