Dan Gohman a5595b02da Reword a few comments for AnalyzeBranch and InsertBranch, and fix ... a few typos. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79503 91177308-0d34-0410-b5e6-96231b3b80d8		2009-08-20 01:33:25 +00:00
..
COFFTargetAsmInfo.h
DarwinTargetAsmInfo.h
SubtargetFeature.h
Target.td
TargetAsmInfo.h
TargetAsmParser.h
TargetCallingConv.td
TargetData.h
TargetELFWriterInfo.h
TargetFrameInfo.h
TargetInstrDesc.h
TargetInstrInfo.h	Reword a few comments for AnalyzeBranch and InsertBranch, and fix	2009-08-20 01:33:25 +00:00
TargetInstrItineraries.h	Use the schedule itinerary operand use/def cycle information to adjust dependence edge latency for post-RA scheduling.	2009-08-19 16:08:58 +00:00
TargetIntrinsicInfo.h
TargetJITInfo.h
TargetLowering.h
TargetLoweringObjectFile.h
TargetMachine.h
TargetMachOWriterInfo.h
TargetOptions.h
TargetRegisterInfo.h
TargetRegistry.h
TargetSchedule.td	Extend the instruction itinerary model to include the ability to indicate the def and use cycle for each operand. This additional information is optional, so existing itineraries do not need to be changed.	2009-08-17 16:02:57 +00:00
TargetSelect.h
TargetSelectionDAG.td
TargetSubtarget.h	Use the schedule itinerary operand use/def cycle information to adjust dependence edge latency for post-RA scheduling.	2009-08-19 16:08:58 +00:00