Matt Arsenault 5f8a9ae17c Fix fmul combines with constant splat vectors ... Fixes things like fmul x, 2 -> fadd x, x git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215820 91177308-0d34-0410-b5e6-96231b3b80d8		2014-08-16 10:14:19 +00:00
..
2r_vector_scalar.ll	[mips][msa] Add fill.d instruction.	2014-01-29 15:12:02 +00:00
2r.ll
2rf_exup.ll
2rf_float_int.ll
2rf_fq.ll
2rf_int_float.ll
2rf_tq.ll
2rf.ll
3r_4r_widen.ll
3r_4r.ll
3r_splat.ll
3r-a.ll
3r-b.ll
3r-c.ll
3r-d.ll
3r-i.ll
3r-m.ll
3r-p.ll
3r-s.ll	[mips][msa] Correct sld and sldi builtins.	2013-12-10 11:37:00 +00:00
3r-v.ll
3rf_4rf_q.ll
3rf_4rf.ll
3rf_exdo.ll
3rf_float_int.ll
3rf_int_float.ll
3rf_q.ll
3rf.ll
arithmetic_float.ll	Fix fmul combines with constant splat vectors	2014-08-16 10:14:19 +00:00
arithmetic.ll
basic_operations_float.ll	[mips][msa] Fix vector insertions where the index is variable	2014-04-30 12:09:32 +00:00
basic_operations.ll	[mips][msa] Fix vector insertions where the index is variable	2014-04-30 12:09:32 +00:00
bit.ll
bitcast.ll
bitwise.ll	[mips] BSEL's and BINS[RL] operands are reversed compared to the vselect node used in the pattern.	2014-03-12 11:54:00 +00:00
compare_float.ll	[mips] BSEL's and BINS[RL] operands are reversed compared to the vselect node used in the pattern.	2014-03-12 11:54:00 +00:00
compare.ll	[mips] BSEL's and BINS[RL] operands are reversed compared to the vselect node used in the pattern.	2014-03-12 11:54:00 +00:00
elm_copy.ll	[mips][msa] Add copy_{u,s}.d.	2014-01-29 14:05:28 +00:00
elm_cxcmsa.ll
elm_insv.ll	[mips][msa] Add insert.d instruction.	2014-01-31 13:31:20 +00:00
elm_move.ll
elm_shift_slide.ll	[mips][msa] Correct sld and sldi builtins.	2013-12-10 11:37:00 +00:00
endian.ll
frameindex.ll	[mips] Improve robustness of some tests.	2014-08-14 13:10:48 +00:00
i5_ld_st.ll
i5-a.ll
i5-b.ll
i5-c.ll
i5-m.ll
i5-s.ll
i8.ll
i10.ll
inline-asm.ll
llvm-stress-s449609655-simplified.ll	Fix known typos	2014-01-24 17:20:08 +00:00
llvm-stress-s525530439.ll
llvm-stress-s997348632.ll
llvm-stress-s1704963983.ll
llvm-stress-s1935737938.ll
llvm-stress-s2090927243-simplified.ll
llvm-stress-s2501752154-simplified.ll
llvm-stress-s2704903805.ll
llvm-stress-s3861334421.ll
llvm-stress-s3926023935.ll
llvm-stress-s3997499501.ll
llvm-stress-sz1-s742806235.ll
shift-dagcombine.ll	[mips] Prevent %lo relocation being used on MSA loads and stores.	2014-03-03 14:31:21 +00:00
shuffle.ll	[mips] Correct lowering of VECTOR_SHUFFLE to VSHF.	2014-03-21 16:56:51 +00:00
special.ll	ps][mips64r6] Added LSA/DLSA instructions	2014-06-20 09:28:09 +00:00
spill.ll
vec.ll	[mips] BSEL's and BINS[RL] operands are reversed compared to the vselect node used in the pattern.	2014-03-12 11:54:00 +00:00
vecs10.ll