Krzysztof Parzyszek 703ff349ac [Hexagon] Generate MUX from conditional transfers when dot-new not possible ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242711 91177308-0d34-0410-b5e6-96231b3b80d8		2015-07-20 21:23:25 +00:00
..
intrinsics
vect
absaddr-store.ll
absimm.ll
adde.ll
addh-sext-trunc.ll
addh-shifted.ll
addh.ll
addrmode-indoff.ll
alu64.ll
always-ext.ll
args.ll
ashift-left-right.ll
Atomics.ll
barrier-flag.ll
base-offset-addr.ll
base-offset-post.ll
block-addr.ll
BranchPredict.ll
brev_ld.ll
brev_st.ll
bugAsmHWloop.ll
calling-conv-2.ll
cext-check.ll
cext-valid-packet1.ll
cext-valid-packet2.ll
cext.ll
cexti16.ll
checktabs.ll
circ_ld.ll
circ_ldd_bug.ll
circ_ldw.ll
circ_st.ll
clr_set_toggle.ll
cmp_pred2.ll
cmp_pred_reg.ll
cmp_pred.ll
cmp-extend.ll
cmp-promote.ll
cmp-to-genreg.ll
cmp-to-predreg.ll
cmp.ll
cmpb_pred.ll
cmpb-eq.ll
combine_ir.ll
combine.ll
common-gep-basic.ll
common-gep-icm.ll
compound.ll
convertdptoint.ll
convertdptoll.ll
convertsptoint.ll
convertsptoll.ll
ctlz-cttz-ctpop.ll
ctor.ll
dadd.ll
dmul.ll
double.ll
doubleconvert-ieee-rnd-near.ll
dsub.ll
dualstore.ll
duplex.ll
eh_return.ll
expand-condsets-basic.ll
expand-condsets-rm-segment.ll
expand-condsets-undef.ll
extload-combine.ll
extract-basic.ll
fadd.ll
fcmp.ll
float.ll
floatconvert-ieee-rnd-near.ll
fmul.ll
frame.ll
fsub.ll
fusedandshift.ll
gp-plus-offset-load.ll
gp-plus-offset-store.ll
gp-rel.ll
hwloop1.ll
hwloop2.ll
hwloop3.ll
hwloop4.ll
hwloop5.ll
hwloop-cleanup.ll
hwloop-const.ll
hwloop-crit-edge.ll
hwloop-dbg.ll
hwloop-le.ll
hwloop-loop1.ll
hwloop-lt1.ll
hwloop-lt.ll
hwloop-missed.ll
hwloop-ne.ll
hwloop-ph-deadcode.ll
hwloop-pos-ivbump1.ll
hwloop-preheader.ll
hwloop-range.ll
hwloop-recursion.ll
hwloop-wrap2.ll
hwloop-wrap.ll
i1_VarArg.ll
i8_VarArg.ll
i16_VarArg.ll
idxload-with-zero-offset.ll
indirect-br.ll
insert-basic.ll
lit.local.cfg
loadi1-G0.ll
loadi1-v4-G0.ll
loadi1-v4.ll
loadi1.ll
macint.ll
maxd.ll
maxh.ll
maxud.ll
maxuw.ll
maxw.ll
mem-fi-add.ll
memops1.ll
memops2.ll
memops3.ll
memops.ll
mind.ll
minu-zext-8.ll
minu-zext-16.ll
minud.ll
minuw.ll
minw.ll
misaligned-access.ll
mpy.ll
mux-basic.ll	[Hexagon] Generate MUX from conditional transfers when dot-new not possible	2015-07-20 21:23:25 +00:00
newvaluejump2.ll
newvaluejump.ll
newvaluestore.ll
opt-fabs.ll
opt-fneg.ll
packetize_cond_inst.ll
postinc-load.ll
postinc-offset.ll
postinc-store.ll
pred-absolute-store.ll
pred-gp.ll
pred-instrs.ll
predicate-copy.ll
predicate-logical.ll
predicate-rcmp.ll
relax.ll
remove_lsr.ll
remove-endloop.ll
shrink-frame-basic.ll
signed_immediates.ll
simple_addend.ll
simpletailcall.ll
split-const32-const64.ll
stack-align1.ll
stack-align2.ll
stack-alloca1.ll
stack-alloca2.ll
static.ll
struct_args_large.ll
struct_args.ll
sube.ll
tail-call-mem-intrinsics.ll
tail-call-trunc.ll
tfr-to-combine.ll
union-1.ll
usr-ovf-dep.ll
vaddh.ll
validate-offset.ll
zextloadi1.ll