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https://github.com/c64scene-ar/llvm-6502.git
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8f2a85e099
This commit adds a weak variant of the cmpxchg operation, as described
in C++11. A cmpxchg instruction with this modifier is permitted to
fail to store, even if the comparison indicated it should.
As a result, cmpxchg instructions must return a flag indicating
success in addition to their original iN value loaded. Thus, for
uniformity *all* cmpxchg instructions now return "{ iN, i1 }". The
second flag is 1 when the store succeeded.
At the DAG level, a new ATOMIC_CMP_SWAP_WITH_SUCCESS node has been
added as the natural representation for the new cmpxchg instructions.
It is a strong cmpxchg.
By default this gets Expanded to the existing ATOMIC_CMP_SWAP during
Legalization, so existing backends should see no change in behaviour.
If they wish to deal with the enhanced node instead, they can call
setOperationAction on it. Beware: as a node with 2 results, it cannot
be selected from TableGen.
Currently, no use is made of the extra information provided in this
patch. Test updates are almost entirely adapting the input IR to the
new scheme.
Summary for out of tree users:
------------------------------
+ Legacy Bitcode files are upgraded during read.
+ Legacy assembly IR files will be invalid.
+ Front-ends must adapt to different type for "cmpxchg".
+ Backends should be unaffected by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210903 91177308-0d34-0410-b5e6-96231b3b80d8
58 lines
2.1 KiB
LLVM
58 lines
2.1 KiB
LLVM
; Test 16-bit compare and swap.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-MAIN
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT
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; Check compare and swap with a variable.
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; - CHECK is for the main loop.
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; - CHECK-SHIFT makes sure that the negated shift count used by the second
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; RLL is set up correctly. The negation is independent of the NILL and L
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; tested in CHECK. CHECK-SHIFT also checks that %r3 is not modified before
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; being used in the RISBG (in contrast to things like atomic addition,
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; which shift %r3 left so that %b is at the high end of the word).
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define i16 @f1(i16 %dummy, i16 *%src, i16 %cmp, i16 %swap) {
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; CHECK-MAIN-LABEL: f1:
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; CHECK-MAIN: sllg [[SHIFT:%r[1-9]+]], %r3, 3
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; CHECK-MAIN: nill %r3, 65532
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; CHECK-MAIN: l [[OLD:%r[0-9]+]], 0(%r3)
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; CHECK-MAIN: [[LOOP:\.[^ ]*]]:
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; CHECK-MAIN: rll %r2, [[OLD]], 16([[SHIFT]])
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; CHECK-MAIN: risbg %r4, %r2, 32, 47, 0
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; CHECK-MAIN: crjlh %r2, %r4, [[EXIT:\.[^ ]*]]
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; CHECK-MAIN: risbg %r5, %r2, 32, 47, 0
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; CHECK-MAIN: rll [[NEW:%r[0-9]+]], %r5, -16({{%r[1-9]+}})
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; CHECK-MAIN: cs [[OLD]], [[NEW]], 0(%r3)
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; CHECK-MAIN: jl [[LOOP]]
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; CHECK-MAIN: [[EXIT]]:
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; CHECK-MAIN-NOT: %r2
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; CHECK-MAIN: br %r14
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;
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; CHECK-SHIFT-LABEL: f1:
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; CHECK-SHIFT: sllg [[SHIFT:%r[1-9]+]], %r3, 3
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; CHECK-SHIFT: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
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; CHECK-SHIFT: rll
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; CHECK-SHIFT: rll {{%r[0-9]+}}, %r5, -16([[NEGSHIFT]])
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%pair = cmpxchg i16 *%src, i16 %cmp, i16 %swap seq_cst seq_cst
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%res = extractvalue { i16, i1 } %pair, 0
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ret i16 %res
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}
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; Check compare and swap with constants. We should force the constants into
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; registers and use the sequence above.
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define i16 @f2(i16 *%src) {
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; CHECK-LABEL: f2:
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; CHECK: lhi [[CMP:%r[0-9]+]], 42
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; CHECK: risbg [[CMP]], {{%r[0-9]+}}, 32, 47, 0
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; CHECK: risbg
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; CHECK: br %r14
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;
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; CHECK-SHIFT-LABEL: f2:
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; CHECK-SHIFT: lhi [[SWAP:%r[0-9]+]], 88
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; CHECK-SHIFT: risbg
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; CHECK-SHIFT: risbg [[SWAP]], {{%r[0-9]+}}, 32, 47, 0
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; CHECK-SHIFT: br %r14
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%pair = cmpxchg i16 *%src, i16 42, i16 88 seq_cst seq_cst
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%res = extractvalue { i16, i1 } %pair, 0
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ret i16 %res
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}
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