Matheus Almeida 6b3f3922bf [mips] Implement jr.hb and jalr.hb (Jump Register and Jump and Link Register with Hazard Barrier). ... Summary: These instructions are available in ISAs >= mips32/mips64. For mips32r6/mips64r6, jr.hb has a new encoding format. Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D4019 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210654 91177308-0d34-0410-b5e6-96231b3b80d8		2014-06-11 15:05:56 +00:00
..
invalid-mips3-wrong-error.s
invalid-mips3.s
invalid-mips4-wrong-error.s	[mips] Marked up instructions added in MIPS-IV and tested that IAS for -mcpu=mips[123] does not accept them	2014-05-09 14:06:17 +00:00
invalid-mips4.s	[mips] Marked up instructions added in MIPS-IV and tested that IAS for -mcpu=mips[123] does not accept them	2014-05-09 14:06:17 +00:00
invalid-mips5-wrong-error.s	[mips] Marked up instructions added in MIPS-V and tested that IAS for -mcpu=mips[1234] does not accept them	2014-05-12 12:52:44 +00:00
invalid-mips5.s	[mips] Marked up instructions added in MIPS-V and tested that IAS for -mcpu=mips[1234] does not accept them	2014-05-12 12:52:44 +00:00
invalid-mips32.s	[mips] Implement jr.hb and jalr.hb (Jump Register and Jump and Link Register with Hazard Barrier).	2014-06-11 15:05:56 +00:00
invalid-mips32r2-xfail.s	[mips] Marked up instructions added in MIPS32r2 and tested that IAS for -mcpu=mips(2|32) does not accept them	2014-05-13 11:45:36 +00:00
invalid-mips32r2.s	[mips] Fix triple.	2014-06-05 12:07:14 +00:00
valid.s