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Summary: Adds MIPS32r6/MIPS64r6 and checks the compatibility requirements for these processors. I've also included comments to describe removed and re-encoded instructions, along with placeholder def's for the new instructions but there are no functional changes to codegen at this point. Reviewers: jkolek, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3622 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208399 91177308-0d34-0410-b5e6-96231b3b80d8
10 lines
270 B
LLVM
10 lines
270 B
LLVM
; RUN: llc -march=mipsel -mcpu=mips32r6 < %s | FileCheck %s
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; RUN: not llc -march=mipsel -mcpu=mips32r6 -mattr=+dsp < %s 2>&1 | FileCheck --check-prefix=DSP %s
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; CHECK: foo:
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; DSP: MIPS32r6 is not compatible with the DSP ASE
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define void @foo() nounwind {
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ret void
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}
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