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11a45c214c
register is needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167341 91177308-0d34-0410-b5e6-96231b3b80d8
21 lines
505 B
LLVM
21 lines
505 B
LLVM
; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 %s -o - | llvm-objdump -disassemble -triple mips64el - | FileCheck %s
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; Sign extend from 32 to 64 was creating nonsense opcodes
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; CHECK: sll ${{[a-z0-9]+}}, ${{[a-z0-9]+}}, 0
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define i64 @foo(i32 %ival) nounwind readnone {
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entry:
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%conv = sext i32 %ival to i64
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ret i64 %conv
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}
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; CHECK: dsll32 ${{[a-z0-9]+}}, ${{[a-z0-9]+}}, 0
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define i64 @foo_2(i32 %ival_2) nounwind readnone {
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entry:
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%conv_2 = zext i32 %ival_2 to i64
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ret i64 %conv_2
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}
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