llvm-6502/lib/Target/ARM/Disassembler
Johnny Chen a704bc9354 A8.6.315 VLD3 (single 3-element structure to all lanes)
The a bit must be encoded as 0.

rdar://problem/9292625


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129618 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-15 22:49:08 +00:00
..
ARMDisassembler.cpp Adding support for printing operands symbolically to llvm's public 'C' 2011-04-11 18:08:50 +00:00
ARMDisassembler.h Better error handling of invalid IT mask '0000', instead of just asserting. 2010-04-19 23:02:58 +00:00
ARMDisassemblerCore.cpp A8.6.315 VLD3 (single 3-element structure to all lanes) 2011-04-15 22:49:08 +00:00
ARMDisassemblerCore.h Print out a debug message when the reglist fails the sanity check for Thumb Ld/St Multiple. 2011-04-12 17:09:04 +00:00
CMakeLists.txt CMake: Add disabling optimization on MSVC8 and MSVC10 as workaround for some files in Target/ARM and Target/X86. 2010-12-29 03:59:27 +00:00
Makefile Re-enable ARM/Thumb disassembler and add a workaround for a memcpy() call in 2010-04-07 20:53:12 +00:00
ThumbDisassemblerCore.h Add sanity checkings for Thumb2 Load/Store Register Exclusive family of operations. 2011-04-14 19:13:28 +00:00