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9a508ef64a
Add earlyclobber constaints to prevent input register being allocated as the output register because, according to Intel spec [1], "If any pair of the index, mask, or destination registers are the same, this instruction results a UD fault." --- [1] http://software.intel.com/sites/default/files/319433-014.pdf git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183327 91177308-0d34-0410-b5e6-96231b3b80d8
19 lines
690 B
LLVM
19 lines
690 B
LLVM
; RUN: not llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core-avx2 | FileCheck %s
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declare <4 x float> @llvm.x86.avx2.gather.d.ps(<4 x float>, i8*,
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<4 x i32>, <4 x float>, i8) nounwind readonly
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define <4 x float> @test_x86_avx2_gather_d_ps(i8* %a1,
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<4 x i32> %idx, <4 x float> %mask) {
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%res = call <4 x float> @llvm.x86.avx2.gather.d.ps(<4 x float> undef,
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i8* %a1, <4 x i32> %idx, <4 x float> %mask, i8 2) ;
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ret <4 x float> %res
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}
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; CHECK: test_x86_avx2_gather_d_ps
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; CHECK: vgatherdps
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; CHECK-NOT: [[DST]]
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; CHECK: [[DST:%xmm[0-9]+]]{{$}}
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; CHECK: ret
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