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The MicroBlaze is a highly configurable 32-bit soft-microprocessor for use on Xilinx FPGAs. For more information see: http://www.xilinx.com/tools/microblaze.htm http://en.wikipedia.org/wiki/MicroBlaze The current LLVM MicroBlaze backend generates assembly which can be compiled using the an appropriate binutils assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96969 91177308-0d34-0410-b5e6-96231b3b80d8
303 lines
10 KiB
C++
303 lines
10 KiB
C++
//===-- MBlazeAsmPrinter.cpp - MBlaze LLVM assembly writer ----------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains a printer that converts from our internal representation
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// of machine-dependent LLVM code to GAS-format MBlaze assembly language.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "mblaze-asm-printer"
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#include "MBlaze.h"
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#include "MBlazeSubtarget.h"
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#include "MBlazeInstrInfo.h"
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#include "MBlazeTargetMachine.h"
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#include "MBlazeMachineFunction.h"
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#include "llvm/Constants.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/Module.h"
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#include "llvm/CodeGen/AsmPrinter.h"
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#include "llvm/CodeGen/DwarfWriter.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineConstantPool.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/MC/MCStreamer.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/Target/TargetData.h"
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#include "llvm/Target/TargetLoweringObjectFile.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/Target/TargetRegistry.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/FormattedStream.h"
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#include "llvm/Support/MathExtras.h"
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#include <cctype>
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using namespace llvm;
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namespace {
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class MBlazeAsmPrinter : public AsmPrinter {
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const MBlazeSubtarget *Subtarget;
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public:
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explicit MBlazeAsmPrinter(formatted_raw_ostream &O, TargetMachine &TM,
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MCContext &Ctx, MCStreamer &Streamer,
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const MCAsmInfo *T )
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: AsmPrinter(O, TM, Ctx, Streamer, T) {
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Subtarget = &TM.getSubtarget<MBlazeSubtarget>();
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}
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virtual const char *getPassName() const {
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return "MBlaze Assembly Printer";
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}
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bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant, const char *ExtraCode);
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void printOperand(const MachineInstr *MI, int opNum);
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void printUnsignedImm(const MachineInstr *MI, int opNum);
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void printFSLImm(const MachineInstr *MI, int opNum);
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void printMemOperand(const MachineInstr *MI, int opNum,
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const char *Modifier = 0);
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void printFCCOperand(const MachineInstr *MI, int opNum,
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const char *Modifier = 0);
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void printSavedRegsBitmask();
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void printHex32(unsigned int Value);
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const char *emitCurrentABIString();
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void emitFrameDirective();
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void printInstruction(const MachineInstr *MI); // autogenerated.
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void EmitInstruction(const MachineInstr *MI) {
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printInstruction(MI);
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O << '\n';
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}
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virtual void EmitFunctionBodyStart();
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virtual void EmitFunctionBodyEnd();
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static const char *getRegisterName(unsigned RegNo);
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virtual void EmitFunctionEntryLabel();
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void EmitStartOfAsmFile(Module &M);
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};
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} // end of anonymous namespace
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#include "MBlazeGenAsmWriter.inc"
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//===----------------------------------------------------------------------===//
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//
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// MBlaze Asm Directives
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//
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// -- Frame directive "frame Stackpointer, Stacksize, RARegister"
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// Describe the stack frame.
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//
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// -- Mask directives "mask bitmask, offset"
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// Tells the assembler which registers are saved and where.
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// bitmask - contain a little endian bitset indicating which registers are
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// saved on function prologue (e.g. with a 0x80000000 mask, the
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// assembler knows the register 31 (RA) is saved at prologue.
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// offset - the position before stack pointer subtraction indicating where
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// the first saved register on prologue is located. (e.g. with a
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//
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// Consider the following function prologue:
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//
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// .frame R19,48,R15
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// .mask 0xc0000000,-8
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// addiu R1, R1, -48
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// sw R15, 40(R1)
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// sw R19, 36(R1)
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//
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// With a 0xc0000000 mask, the assembler knows the register 15 (R15) and
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// 19 (R19) are saved at prologue. As the save order on prologue is from
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// left to right, R15 is saved first. A -8 offset means that after the
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// stack pointer subtration, the first register in the mask (R15) will be
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// saved at address 48-8=40.
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Mask directives
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//===----------------------------------------------------------------------===//
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// Create a bitmask with all callee saved registers for CPU or Floating Point
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// registers. For CPU registers consider RA, GP and FP for saving if necessary.
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void MBlazeAsmPrinter::printSavedRegsBitmask() {
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const TargetRegisterInfo &RI = *TM.getRegisterInfo();
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const MBlazeFunctionInfo *MBlazeFI = MF->getInfo<MBlazeFunctionInfo>();
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// CPU Saved Registers Bitmasks
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unsigned int CPUBitmask = 0;
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// Set the CPU Bitmasks
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const MachineFrameInfo *MFI = MF->getFrameInfo();
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const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
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for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
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unsigned RegNum = MBlazeRegisterInfo::getRegisterNumbering(CSI[i].getReg());
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if (CSI[i].getRegClass() == MBlaze::CPURegsRegisterClass)
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CPUBitmask |= (1 << RegNum);
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}
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// Return Address and Frame registers must also be set in CPUBitmask.
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if (RI.hasFP(*MF))
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CPUBitmask |= (1 << MBlazeRegisterInfo::
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getRegisterNumbering(RI.getFrameRegister(*MF)));
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if (MFI->hasCalls())
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CPUBitmask |= (1 << MBlazeRegisterInfo::
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getRegisterNumbering(RI.getRARegister()));
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// Print CPUBitmask
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O << "\t.mask \t"; printHex32(CPUBitmask); O << ','
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<< MBlazeFI->getCPUTopSavedRegOff() << '\n';
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}
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// Print a 32 bit hex number with all numbers.
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void MBlazeAsmPrinter::printHex32(unsigned int Value) {
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O << "0x";
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for (int i = 7; i >= 0; i--)
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O << utohexstr( (Value & (0xF << (i*4))) >> (i*4) );
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}
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//===----------------------------------------------------------------------===//
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// Frame and Set directives
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//===----------------------------------------------------------------------===//
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/// Frame Directive
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void MBlazeAsmPrinter::emitFrameDirective() {
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const TargetRegisterInfo &RI = *TM.getRegisterInfo();
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unsigned stackReg = RI.getFrameRegister(*MF);
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unsigned returnReg = RI.getRARegister();
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unsigned stackSize = MF->getFrameInfo()->getStackSize();
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O << "\t.frame\t" << getRegisterName(stackReg)
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<< ',' << stackSize << ','
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<< getRegisterName(returnReg)
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<< '\n';
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}
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void MBlazeAsmPrinter::EmitFunctionEntryLabel() {
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O << "\t.ent\t" << *CurrentFnSym << '\n';
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OutStreamer.EmitLabel(CurrentFnSym);
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}
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/// EmitFunctionBodyStart - Targets can override this to emit stuff before
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/// the first basic block in the function.
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void MBlazeAsmPrinter::EmitFunctionBodyStart() {
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emitFrameDirective();
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printSavedRegsBitmask();
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}
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/// EmitFunctionBodyEnd - Targets can override this to emit stuff after
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/// the last basic block in the function.
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void MBlazeAsmPrinter::EmitFunctionBodyEnd() {
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O << "\t.end\t" << *CurrentFnSym << '\n';
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}
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// Print out an operand for an inline asm expression.
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bool MBlazeAsmPrinter::
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PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant,const char *ExtraCode){
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// Does this asm operand have a single letter operand modifier?
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if (ExtraCode && ExtraCode[0])
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return true; // Unknown modifier.
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printOperand(MI, OpNo);
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return false;
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}
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void MBlazeAsmPrinter::printOperand(const MachineInstr *MI, int opNum) {
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const MachineOperand &MO = MI->getOperand(opNum);
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switch (MO.getType()) {
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case MachineOperand::MO_Register:
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O << getRegisterName(MO.getReg());
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break;
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case MachineOperand::MO_Immediate:
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O << (int)MO.getImm();
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break;
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case MachineOperand::MO_FPImmediate: {
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const ConstantFP* fp = MO.getFPImm();
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printHex32(fp->getValueAPF().bitcastToAPInt().getZExtValue());
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O << ";\t# immediate = " << *fp;
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break;
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}
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case MachineOperand::MO_MachineBasicBlock:
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O << *MO.getMBB()->getSymbol(OutContext);
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return;
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case MachineOperand::MO_GlobalAddress:
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O << *GetGlobalValueSymbol(MO.getGlobal());
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break;
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case MachineOperand::MO_ExternalSymbol:
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O << *GetExternalSymbolSymbol(MO.getSymbolName());
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break;
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case MachineOperand::MO_JumpTableIndex:
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O << MAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
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<< '_' << MO.getIndex();
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break;
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case MachineOperand::MO_ConstantPoolIndex:
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O << MAI->getPrivateGlobalPrefix() << "CPI"
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<< getFunctionNumber() << "_" << MO.getIndex();
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if (MO.getOffset())
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O << "+" << MO.getOffset();
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break;
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default:
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llvm_unreachable("<unknown operand type>");
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}
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}
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void MBlazeAsmPrinter::printUnsignedImm(const MachineInstr *MI, int opNum) {
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const MachineOperand &MO = MI->getOperand(opNum);
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if (MO.getType() == MachineOperand::MO_Immediate)
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O << (unsigned int)MO.getImm();
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else
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printOperand(MI, opNum);
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}
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void MBlazeAsmPrinter::printFSLImm(const MachineInstr *MI, int opNum) {
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const MachineOperand &MO = MI->getOperand(opNum);
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if (MO.getType() == MachineOperand::MO_Immediate)
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O << "rfsl" << (unsigned int)MO.getImm();
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else
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printOperand(MI, opNum);
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}
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void MBlazeAsmPrinter::
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printMemOperand(const MachineInstr *MI, int opNum, const char *Modifier) {
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printOperand(MI, opNum+1);
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O << ", ";
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printOperand(MI, opNum);
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}
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void MBlazeAsmPrinter::
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printFCCOperand(const MachineInstr *MI, int opNum, const char *Modifier) {
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const MachineOperand& MO = MI->getOperand(opNum);
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O << MBlaze::MBlazeFCCToString((MBlaze::CondCode)MO.getImm());
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}
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void MBlazeAsmPrinter::EmitStartOfAsmFile(Module &M) {
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}
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// Force static initialization.
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extern "C" void LLVMInitializeMBlazeAsmPrinter() {
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RegisterAsmPrinter<MBlazeAsmPrinter> X(TheMBlazeTarget);
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}
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