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https://github.com/c64scene-ar/llvm-6502.git
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614051a1c5
Mips1 does not support double precision loads or stores, therefore two single precision loads or stores must be used in place of these instructions. This patch treats double precision loads and stores as if they are legal instructions until MCInstLowering, instead of generating the single precision instructions during instruction selection or Prolog/Epilog code insertion. Without the changes made in this patch, llc produces code that has the same problem described in r137484 or bails out when MipsInstrInfo::storeRegToStackSlot or loadRegFromStackSlot is called before register allocation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137711 91177308-0d34-0410-b5e6-96231b3b80d8
49 lines
1.5 KiB
C++
49 lines
1.5 KiB
C++
//===-- MipsMCInstLower.h - Lower MachineInstr to MCInst -------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#ifndef MIPSMCINSTLOWER_H
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#define MIPSMCINSTLOWER_H
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/CodeGen/MachineOperand.h"
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#include "llvm/Support/Compiler.h"
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namespace llvm {
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class MCAsmInfo;
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class MCContext;
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class MCInst;
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class MCOperand;
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class MCSymbol;
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class MachineInstr;
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class MachineFunction;
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class Mangler;
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class MipsAsmPrinter;
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/// MipsMCInstLower - This class is used to lower an MachineInstr into an
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// MCInst.
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class LLVM_LIBRARY_VISIBILITY MipsMCInstLower {
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typedef MachineOperand::MachineOperandType MachineOperandType;
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MCContext &Ctx;
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Mangler *Mang;
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MipsAsmPrinter &AsmPrinter;
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public:
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MipsMCInstLower(Mangler *mang, const MachineFunction &MF,
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MipsAsmPrinter &asmprinter);
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void Lower(const MachineInstr *MI, MCInst &OutMI) const;
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void LowerMips1F64LoadStore(const MachineInstr *MI, unsigned Opc,
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SmallVector<MCInst, 4>& MCInsts,
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bool isLittle, const unsigned *SubReg) const;
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private:
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MCOperand LowerSymbolOperand(const MachineOperand &MO,
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MachineOperandType MOTy, unsigned Offset) const;
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MCOperand LowerOperand(const MachineOperand& MO) const;
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};
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}
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#endif
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