llvm-6502/test/MC/Disassembler/ARM/invalid-LDRT-arm.txt
Owen Anderson 8d7d2e1238 Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
This new disassembler can correctly decode all the testcases that the old one did, though
some "expected failure" testcases are XFAIL'd for now because it is not (yet) as strict in
operand checking as the old one was.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137144 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 20:55:18 +00:00

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# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
# Opcode=0 Name=PHI Format=(42)
# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
# -------------------------------------------------------------------------------------------------
# | 1: 1: 1: 0| 0: 1: 1: 0| 0: 0: 1: 1| 0: 1: 1: 1| 0: 1: 0: 1| 0: 0: 0: 1| 0: 0: 0: 1| 0: 0: 0: 0|
# -------------------------------------------------------------------------------------------------
#
# The bytes have Inst{4} = 1, so it's not an LDRT Encoding A2 instruction.
0x10 0x51 0x37 0xe6