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93fa4766c2
using vextractf128. This will reduce the number of issued instruction for several avx codes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136323 91177308-0d34-0410-b5e6-96231b3b80d8
48 lines
1.6 KiB
LLVM
48 lines
1.6 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s
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; CHECK: vxorps
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; CHECK-NEXT: vinsertf128 $0
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define <8 x float> @castA(<4 x float> %m) nounwind uwtable readnone ssp {
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entry:
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%shuffle.i = shufflevector <4 x float> %m, <4 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4>
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ret <8 x float> %shuffle.i
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}
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; CHECK: vxorps
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; CHECK-NEXT: vinsertf128 $0
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define <4 x double> @castB(<2 x double> %m) nounwind uwtable readnone ssp {
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entry:
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%shuffle.i = shufflevector <2 x double> %m, <2 x double> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 2>
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ret <4 x double> %shuffle.i
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}
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; CHECK: vpxor
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; CHECK-NEXT: vinsertf128 $0
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define <4 x i64> @castC(<2 x i64> %m) nounwind uwtable readnone ssp {
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entry:
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%shuffle.i = shufflevector <2 x i64> %m, <2 x i64> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 2>
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ret <4 x i64> %shuffle.i
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}
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; CHECK-NOT: vextractf128 $0
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define <4 x float> @castD(<8 x float> %m) nounwind uwtable readnone ssp {
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entry:
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%shuffle.i = shufflevector <8 x float> %m, <8 x float> %m, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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ret <4 x float> %shuffle.i
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}
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; CHECK-NOT: vextractf128 $0
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define <2 x i64> @castE(<4 x i64> %m) nounwind uwtable readnone ssp {
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entry:
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%shuffle.i = shufflevector <4 x i64> %m, <4 x i64> %m, <2 x i32> <i32 0, i32 1>
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ret <2 x i64> %shuffle.i
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}
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; CHECK-NOT: vextractf128 $0
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define <2 x double> @castF(<4 x double> %m) nounwind uwtable readnone ssp {
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entry:
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%shuffle.i = shufflevector <4 x double> %m, <4 x double> %m, <2 x i32> <i32 0, i32 1>
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ret <2 x double> %shuffle.i
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}
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