Eli Friedman 981a010c09 Relax the MemOperands on atomics a bit. Fixes -verify-machineinstrs failures for atomic laod/store on ARM. ... (The fix for the related failures on x86 is going to be nastier because we actually need Acquire memoperands attached to the atomic load instrs, etc.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139221 91177308-0d34-0410-b5e6-96231b3b80d8		2011-09-07 02:23:42 +00:00
..
CMakeLists.txt	Rewrite the CMake build to use explicit dependencies between libraries,	2011-07-29 00:14:25 +00:00
DAGCombiner.cpp	Add codegen support for vector select (in the IR this means a select	2011-09-06 19:07:46 +00:00
FastISel.cpp	FastISel: avoid function calls between the materialization of the constant and its use.	2011-08-18 22:06:10 +00:00
FunctionLoweringInfo.cpp	Add the support in code-gen for the landingpad instruction lowering.	2011-08-17 21:56:44 +00:00
InstrEmitter.cpp	Follow up to r138791.	2011-08-30 19:09:48 +00:00
InstrEmitter.h	- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and	2011-06-28 19:10:37 +00:00
LegalizeDAG.cpp	Split the init.trampoline intrinsic, which currently combines GCC's	2011-09-06 13:37:06 +00:00
LegalizeFloatTypes.cpp	Misc cleanup; addresses Duncan's comments on r138877.	2011-08-31 20:13:26 +00:00
LegalizeIntegerTypes.cpp	Add codegen support for vector select (in the IR this means a select	2011-09-06 19:07:46 +00:00
LegalizeTypes.cpp	Add codegen support for vector select (in the IR this means a select	2011-09-06 19:07:46 +00:00
LegalizeTypes.h	Add codegen support for vector select (in the IR this means a select	2011-09-06 19:07:46 +00:00
LegalizeTypesGeneric.cpp	Add codegen support for vector select (in the IR this means a select	2011-09-06 19:07:46 +00:00
LegalizeVectorOps.cpp	Add codegen support for vector select (in the IR this means a select	2011-09-06 19:07:46 +00:00
LegalizeVectorTypes.cpp	Add codegen support for vector select (in the IR this means a select	2011-09-06 19:07:46 +00:00
Makefile
ScheduleDAGFast.cpp	- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and	2011-06-28 19:10:37 +00:00
ScheduleDAGList.cpp	Various bits of framework needed for precise machine-level selection	2010-12-24 05:03:26 +00:00
ScheduleDAGRRList.cpp	PreRA scheduler should avoid cloning compares.	2011-09-01 00:54:31 +00:00
ScheduleDAGSDNodes.cpp	Rename TargetSubtarget to TargetSubtargetInfo for consistency.	2011-07-01 21:01:15 +00:00
ScheduleDAGSDNodes.h	The index stored in the RegDefIter is one after the current index. When getting the index, decrement it so that it points to the current element. Fixes an off-by-one bug encountered when trying to make use of MVT::untyped.	2011-06-27 18:34:12 +00:00
SDNodeDbgValue.h	Do not lose debug info of an inlined function argument even if the argument is only used through GEPs.	2011-02-18 22:43:42 +00:00
SDNodeOrdering.h
SelectionDAG.cpp	Relax the MemOperands on atomics a bit. Fixes -verify-machineinstrs failures for atomic laod/store on ARM.	2011-09-07 02:23:42 +00:00
SelectionDAGBuilder.cpp	Add codegen support for vector select (in the IR this means a select	2011-09-06 19:07:46 +00:00
SelectionDAGBuilder.h	Basic x86 code generation for atomic load and store instructions.	2011-08-24 20:50:09 +00:00
SelectionDAGISel.cpp	Follow up to r138791.	2011-08-30 19:09:48 +00:00
SelectionDAGPrinter.cpp	Pass the graph to the DOTGraphTraits.getEdgeAttributes().	2011-02-27 04:11:03 +00:00
TargetLowering.cpp	Add codegen support for vector select (in the IR this means a select	2011-09-06 19:07:46 +00:00
TargetSelectionDAGInfo.cpp