llvm-6502/test/CodeGen/R600/insert_subreg.ll
Tom Stellard 1f996fa36b R600/SI: Add a stub GCNTargetMachine
This is equivalent to the AMDGPUTargetMachine now, but it is the
starting point for separating R600 and GCN functionality into separate
targets.

It is recommened that users start using the gcn triple for GCN-based
GPUs, because using the r600 triple for these GPUs will be deprecated in
the future.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225277 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-06 18:00:21 +00:00

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LLVM

; RUN: llc -march=amdgcn -mcpu=SI -mattr=-promote-alloca -verify-machineinstrs < %s
; Test that INSERT_SUBREG instructions don't have non-register operands after
; instruction selection.
; Make sure this doesn't crash
; CHECK-LABEL: test:
define void @test(i64 addrspace(1)* %out) {
entry:
%tmp0 = alloca [16 x i32]
%tmp1 = ptrtoint [16 x i32]* %tmp0 to i32
%tmp2 = sext i32 %tmp1 to i64
store i64 %tmp2, i64 addrspace(1)* %out
ret void
}