Chris Lattner 7b5987d56e Allow targets which produce setcc results in non-MVT::i1 registers to describe ... what the contents of the top bits of these registers are, in the common cases of targets that sign and zero extend the results. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21145 91177308-0d34-0410-b5e6-96231b3b80d8		2005-04-07 19:41:18 +00:00
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llvm	Allow targets which produce setcc results in non-MVT::i1 registers to describe	2005-04-07 19:41:18 +00:00