llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-07-22 09:29:31 +00:00

History

Jakob Stoklund Olesen 2a9d1ca9c2 Remove custom allocation order boilerplate that is no longer needed. The register allocators automatically filter out reserved registers and place the callee saved registers last in the allocation order, so custom methods are no longer necessary just for that. Some targets still use custom allocation orders: ARM/Thumb: The high registers are removed from GPR in thumb mode. The NEON allocation orders prefer to use non-VFP2 registers first. X86: The GR8 classes omit AH-DH in x86-64 mode to avoid REX trouble. SystemZ: Some of the allocation orders are omitting R12 aliases without explanation. I don't understand this target well enough to fix that. It looks like all the boilerplate could be removed by reserving the right registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132781 91177308-0d34-0410-b5e6-96231b3b80d8		2011-06-09 16:56:59 +00:00
..
InstPrinter	We need to pass the TargetMachine object to the InstPrinter if we are printing	2011-03-21 04:13:46 +00:00
TargetInfo
CMakeLists.txt	Use explicit add_subdirectory's for LLVM target sublibraries instead	2011-02-20 02:55:27 +00:00
Makefile
MSP430.h
MSP430.td
MSP430AsmPrinter.cpp	We need to pass the TargetMachine object to the InstPrinter if we are printing	2011-03-21 04:13:46 +00:00
MSP430BranchSelector.cpp
MSP430CallingConv.td
MSP430FrameLowering.cpp
MSP430FrameLowering.h
MSP430InstrFormats.td
MSP430InstrInfo.cpp
MSP430InstrInfo.h
MSP430InstrInfo.td
MSP430ISelDAGToDAG.cpp
MSP430ISelLowering.cpp	Add a parameter to CCState so that it can access the MachineFunction.	2011-06-08 23:55:35 +00:00
MSP430ISelLowering.h	Make the logic for determining function alignment more explicit. No functionality change.	2011-05-06 20:34:06 +00:00
MSP430MachineFunctionInfo.h
MSP430MCAsmInfo.cpp
MSP430MCAsmInfo.h
MSP430MCInstLower.cpp
MSP430MCInstLower.h
MSP430RegisterInfo.cpp	Remove custom allocation order boilerplate that is no longer needed.	2011-06-09 16:56:59 +00:00
MSP430RegisterInfo.h	Use the dwarf->llvm mapping to print register names in the cfi	2011-05-30 20:20:15 +00:00
MSP430RegisterInfo.td	Remove custom allocation order boilerplate that is no longer needed.	2011-06-09 16:56:59 +00:00
MSP430SelectionDAGInfo.cpp
MSP430SelectionDAGInfo.h
MSP430Subtarget.cpp
MSP430Subtarget.h
MSP430TargetMachine.cpp
MSP430TargetMachine.h
README.txt

README.txt

//===---------------------------------------------------------------------===//
// MSP430 backend.
//===---------------------------------------------------------------------===//

DISCLAIMER: Thid backend should be considered as highly experimental. I never
seen nor worked with this MCU, all information was gathered from datasheet
only. The original intention of making this backend was to write documentation
of form "How to write backend for dummies" :) Thes notes hopefully will be
available pretty soon.

Some things are incomplete / not implemented yet (this list surely is not
complete as well):

1. Verify, how stuff is handling implicit zext with 8 bit operands (this might
be modelled currently in improper way - should we need to mark the superreg as
def for every 8 bit instruction?).

2. Libcalls: multiplication, division, remainder. Note, that calling convention
for libcalls is incomptible with calling convention of libcalls of msp430-gcc
(these cannot be used though due to license restriction).

3. Implement multiplication / division by constant (dag combiner hook?).

4. Implement non-constant shifts.

5. Implement varargs stuff.

6. Verify and fix (if needed) how's stuff playing with i32 / i64.

7. Implement floating point stuff (softfp?)

8. Implement instruction encoding for (possible) direct code emission in the
future.

9. Since almost all instructions set flags - implement brcond / select in better
way (currently they emit explicit comparison).

10. Handle imm in comparisons in better way (see comment in MSP430InstrInfo.td)

11. Implement hooks for better memory op folding, etc.