Akira Hatanaka a921164f39 Do not treat atomic.load.sub differently than other atomic binary intrinsics. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135418 91177308-0d34-0410-b5e6-96231b3b80d8

2011-07-18 19:58:59 +00:00

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2008-06-05-Carry.ll

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2008-07-03-SRet.ll

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2008-07-05-ByVal.ll

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2008-07-06-fadd64.ll

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2008-07-07-Float2Int.ll

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2008-07-07-FPExtend.ll

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2008-07-07-IntDoubleConvertions.ll

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2008-07-15-InternalConstant.ll

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2008-07-15-SmallSection.ll

Prevent generation of redundant addiu instructions that compute address of

2011-06-24 17:55:19 +00:00

2008-07-16-SignExtInReg.ll

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2008-07-22-Cstpool.ll

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2008-07-23-fpcmp.ll

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2008-07-29-icmp.ll

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2008-07-31-fcopysign.ll

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2008-08-01-AsmInline.ll

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2008-08-03-fabs64.ll

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2008-08-03-ReturnDouble.ll

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2008-08-04-Bitconvert.ll

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2008-08-06-Alloca.ll

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2008-08-07-CC.ll

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2008-08-07-FPRound.ll

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2008-08-08-bswap.ll

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2008-08-08-ctlz.ll

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2008-10-13-LegalizerBug.ll

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2008-11-10-xint_to_fp.ll

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2009-11-16-CstPoolLoad.ll

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2010-04-07-DbgValueOtherTargets.ll

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2010-07-20-Select.ll

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2010-07-20-Switch.ll

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2010-11-09-CountLeading.ll

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2010-11-09-Mul.ll

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2011-05-26-BranchKillsVreg.ll

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addc.ll

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alloca.ll

Change the chain input of nodes that load the address of a function. This change

2011-06-24 19:01:25 +00:00

analyzebranch.ll

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atomic.ll

Do not treat atomic.load.sub differently than other atomic binary intrinsics.

2011-07-18 19:58:59 +00:00

blockaddr.ll

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buildpairextractelementf64.ll

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cmov.ll

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dg.exp

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divrem.ll

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double2int.ll

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eh.ll

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fcopysign.ll

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fpbr.ll

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fpcmp.ll

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frame-address.ll

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gprestore.ll

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i64arg.ll

Change the chain input of nodes that load the address of a function. This change

2011-06-24 19:01:25 +00:00

inlineasmmemop.ll

Re-apply 132758 and 132768 which were speculatively reverted in 132777.

2011-06-21 00:40:49 +00:00

internalfunc.ll

Prevent generation of redundant addiu instructions that compute address of

2011-06-24 17:55:19 +00:00

largeimm1.ll

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largeimmprinting.ll

Change the chain input of nodes that load the address of a function. This change

2011-06-24 19:01:25 +00:00

madd-msub.ll

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o32_cc_byval.ll

Prevent generation of redundant addiu instructions that compute address of

2011-06-24 17:55:19 +00:00

o32_cc_vararg.ll

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o32_cc.ll

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private.ll

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rotate.ll

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select.ll

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tls.ll

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weak.ll

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