llvm-6502/lib/TableGen
Sean Silva 57838db0a1 De-nest if's and fix mix-up
Two deeply nested if's obscured that the sense of the conditions was
mixed up. Amazingly, TableGen's output is exactly the same even with the
sense of the tests fixed; it seems that all of TableGen's conversions
are symmetric so that the inverted sense was nonetheless correct "by
accident". As such, I couldn't come up with a test case.

If there does in fact exist a non-symmetric conversion in TableGen's
type system, then a test case should be prepared.

Despite the symmetry, both if's are left in place for robustness in the
face of future changes.

Review by Jakob.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164195 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19 02:14:59 +00:00
..
CMakeLists.txt
Error.cpp Print out the location of expanded multiclass defs in TableGen errors. 2012-08-22 23:33:58 +00:00
LLVMBuild.txt
Main.cpp
Makefile
Record.cpp De-nest if's and fix mix-up 2012-09-19 02:14:59 +00:00
StringMatcher.cpp
TableGenAction.cpp
TableGenBackend.cpp
TGLexer.cpp
TGLexer.h
TGParser.cpp Re-work bit/bits value resolving in tblgen 2012-09-06 23:32:48 +00:00
TGParser.h