mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-18 10:31:57 +00:00
d04a8d4b33
Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
60 lines
1.8 KiB
C++
60 lines
1.8 KiB
C++
//===-- MipsMachineFunctionInfo.cpp - Private data used for Mips ----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "MipsMachineFunction.h"
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#include "MCTargetDesc/MipsBaseInfo.h"
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#include "MipsInstrInfo.h"
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#include "MipsSubtarget.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/Function.h"
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#include "llvm/Support/CommandLine.h"
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using namespace llvm;
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static cl::opt<bool>
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FixGlobalBaseReg("mips-fix-global-base-reg", cl::Hidden, cl::init(true),
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cl::desc("Always use $gp as the global base register."));
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bool MipsFunctionInfo::globalBaseRegSet() const {
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return GlobalBaseReg;
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}
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unsigned MipsFunctionInfo::getGlobalBaseReg() {
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// Return if it has already been initialized.
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if (GlobalBaseReg)
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return GlobalBaseReg;
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const MipsSubtarget &ST = MF.getTarget().getSubtarget<MipsSubtarget>();
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const TargetRegisterClass *RC;
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if (ST.inMips16Mode())
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RC=(const TargetRegisterClass*)&Mips::CPU16RegsRegClass;
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else
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RC = ST.isABI_N64() ?
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(const TargetRegisterClass*)&Mips::CPU64RegsRegClass :
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(const TargetRegisterClass*)&Mips::CPURegsRegClass;
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return GlobalBaseReg = MF.getRegInfo().createVirtualRegister(RC);
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}
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bool MipsFunctionInfo::mips16SPAliasRegSet() const {
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return Mips16SPAliasReg;
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}
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unsigned MipsFunctionInfo::getMips16SPAliasReg() {
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// Return if it has already been initialized.
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if (Mips16SPAliasReg)
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return Mips16SPAliasReg;
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const TargetRegisterClass *RC;
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RC=(const TargetRegisterClass*)&Mips::CPU16RegsRegClass;
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return Mips16SPAliasReg = MF.getRegInfo().createVirtualRegister(RC);
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}
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void MipsFunctionInfo::anchor() { }
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