Matt Arsenault 0b87955888 R600/SI: Use a register set to -1 for data0 on ds_inc*/ds_dec* ... There is not such thing as a 0-data ds instruction, and the data operand needs to be a vgpr set to something meaningful. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210756 91177308-0d34-0410-b5e6-96231b3b80d8		2014-06-12 08:21:54 +00:00
..
InstPrinter
MCTargetDesc
TargetInfo
AMDGPU.h	R600: Add definition for flat address space ID.	2014-05-22 18:27:07 +00:00
AMDGPU.td
AMDGPUAsmPrinter.cpp
AMDGPUAsmPrinter.h
AMDGPUCallingConv.td
AMDGPUConvertToISA.cpp
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUInstrInfo.cpp
AMDGPUInstrInfo.h
AMDGPUInstrInfo.td	R600/SI: Use v_cvt_f32_ubyte* instructions	2014-06-11 17:50:44 +00:00
AMDGPUInstructions.td	R600/SI: Add common 64-bit LDS atomics	2014-06-11 18:08:54 +00:00
AMDGPUIntrinsics.td	R600/SI: Use v_cvt_f32_ubyte* instructions	2014-06-11 17:50:44 +00:00
AMDGPUISelDAGToDAG.cpp	R600/SI: Fix selection failure on scalar_to_vector	2014-06-11 17:40:32 +00:00
AMDGPUISelLowering.cpp	R600/SI: Use v_cvt_f32_ubyte* instructions	2014-06-11 17:50:44 +00:00
AMDGPUISelLowering.h	R600/SI: Use v_cvt_f32_ubyte* instructions	2014-06-11 17:50:44 +00:00
AMDGPUMachineFunction.cpp
AMDGPUMachineFunction.h
AMDGPUMCInstLower.cpp
AMDGPUMCInstLower.h
AMDGPURegisterInfo.cpp
AMDGPURegisterInfo.h
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp
AMDGPUSubtarget.h	R600: Use BCNT_INT for evergreen	2014-06-10 19:18:28 +00:00
AMDGPUTargetMachine.cpp	R600: Add definition for flat address space ID.	2014-05-22 18:27:07 +00:00
AMDGPUTargetMachine.h
AMDGPUTargetTransformInfo.cpp
AMDILBase.td
AMDILCFGStructurizer.cpp
AMDILInstrInfo.td
AMDILIntrinsicInfo.cpp
AMDILIntrinsicInfo.h
AMDILIntrinsics.td	R600/SI: Use bcnt instruction for ctpop	2014-06-10 19:18:21 +00:00
AMDILISelLowering.cpp	R600/SI: Use bcnt instruction for ctpop	2014-06-10 19:18:21 +00:00
AMDILRegisterInfo.td
CaymanInstructions.td
CMakeLists.txt
EvergreenInstructions.td	R600: BCNT_INT is a vector only instruction	2014-06-11 20:51:39 +00:00
LLVMBuild.txt
Makefile
Processors.td
R600ClauseMergePass.cpp
R600ControlFlowFinalizer.cpp
R600Defines.h
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp
R600InstrFormats.td
R600InstrInfo.cpp
R600InstrInfo.h
R600Instructions.td	R600: Set correct InstrItinClass for instructions using *Helper classes	2014-06-11 20:51:42 +00:00
R600Intrinsics.td
R600ISelLowering.cpp	R600: Add dag combine for BFE	2014-05-22 18:09:07 +00:00
R600ISelLowering.h
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp
R600MachineScheduler.h
R600OptimizeVectorRegisters.cpp
R600Packetizer.cpp
R600RegisterInfo.cpp
R600RegisterInfo.h
R600RegisterInfo.td
R600Schedule.td
R600TextureIntrinsicsReplacer.cpp
R700Instructions.td
SIAnnotateControlFlow.cpp
SIDefines.h
SIFixSGPRCopies.cpp
SIInsertWaits.cpp
SIInstrFormats.td
SIInstrInfo.cpp	R600/SI: Emit an error when attempting to spill VGPRs v4	2014-06-10 21:20:41 +00:00
SIInstrInfo.h	R600/SI: Implement i64 ctpop	2014-06-10 19:18:24 +00:00
SIInstrInfo.td	R600/SI: Use a register set to -1 for data0 on ds_inc*/ds_dec*	2014-06-12 08:21:54 +00:00
SIInstructions.td	R600/SI: Use a register set to -1 for data0 on ds_inc*/ds_dec*	2014-06-12 08:21:54 +00:00
SIIntrinsics.td
SIISelLowering.cpp	R600/SI: Use v_cvt_f32_ubyte* instructions	2014-06-11 17:50:44 +00:00
SIISelLowering.h	R600/SI: Use v_cvt_f32_ubyte* instructions	2014-06-11 17:50:44 +00:00
SILowerControlFlow.cpp
SILowerI1Copies.cpp
SIMachineFunctionInfo.cpp
SIMachineFunctionInfo.h
SIRegisterInfo.cpp
SIRegisterInfo.h
SIRegisterInfo.td
SISchedule.td
SITypeRewriter.cpp