llvm-6502/utils/TableGen
Jim Grosbach d3e31218ef TableGen: Pattern<> references to null_frag are a nop.
A standalone pattern defined in a multiclass expansion should handle
null_frag references just like patterns on instructions. Follow-up to
r160333.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160384 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-17 18:39:36 +00:00
..
AsmMatcherEmitter.cpp Defer checking for registers in the MC AsmMatcher until the after user-defined match classes have been checked. This allows the creation of MatchClass's that are supersets of a register class. 2012-07-16 23:20:09 +00:00
AsmWriterEmitter.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
AsmWriterInst.cpp
AsmWriterInst.h
CallingConvEmitter.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
CMakeLists.txt I'm introducing a new machine model to simultaneously allow simple 2012-07-07 04:00:00 +00:00
CodeEmitterGen.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
CodeGenDAGPatterns.cpp TableGen: Pattern<> references to null_frag are a nop. 2012-07-17 18:39:36 +00:00
CodeGenDAGPatterns.h
CodeGenInstruction.cpp
CodeGenInstruction.h
CodeGenIntrinsics.h
CodeGenRegisters.cpp
CodeGenRegisters.h
CodeGenSchedule.cpp I'm introducing a new machine model to simultaneously allow simple 2012-07-07 04:00:00 +00:00
CodeGenSchedule.h I'm introducing a new machine model to simultaneously allow simple 2012-07-07 04:00:00 +00:00
CodeGenTarget.cpp I'm introducing a new machine model to simultaneously allow simple 2012-07-07 04:00:00 +00:00
CodeGenTarget.h I'm introducing a new machine model to simultaneously allow simple 2012-07-07 04:00:00 +00:00
DAGISelEmitter.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
DAGISelMatcher.cpp
DAGISelMatcher.h
DAGISelMatcherEmitter.cpp
DAGISelMatcherGen.cpp Teach TableGen to put chains on more instructions 2012-06-26 18:46:28 +00:00
DAGISelMatcherOpt.cpp
DFAPacketizerEmitter.cpp Fix Windows build after r159281: s/iterator/const_iterator 2012-06-28 07:47:50 +00:00
DisassemblerEmitter.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
EDEmitter.cpp X86: add GATHER intrinsics (AVX2) in LLVM 2012-06-26 19:47:59 +00:00
FastISelEmitter.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
FixedLenDecoderEmitter.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
InstrInfoEmitter.cpp I'm introducing a new machine model to simultaneously allow simple 2012-07-07 04:00:00 +00:00
IntrinsicEmitter.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
LLVMBuild.txt
Makefile
PseudoLoweringEmitter.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
RegisterInfoEmitter.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
SequenceToOffsetTable.h
SetTheory.cpp
SetTheory.h
StringToOffsetTable.h
SubtargetEmitter.cpp Machine model: allow itineraries to be shared by different processor models. 2012-07-09 20:43:03 +00:00
TableGen.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
TableGenBackends.h Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
TGValueTypes.cpp
X86DisassemblerShared.h
X86DisassemblerTables.cpp
X86DisassemblerTables.h
X86ModRMFilters.cpp
X86ModRMFilters.h
X86RecognizableInstr.cpp Update GATHER instructions to support 2 read-write operands. Patch from myself and Manman Ren. 2012-07-12 06:52:41 +00:00
X86RecognizableInstr.h Update GATHER instructions to support 2 read-write operands. Patch from myself and Manman Ren. 2012-07-12 06:52:41 +00:00