Tilmann Scheller 6b968eccd7 ARM: Teach assembler to enforce constraint for Thumb2 LDRD (literal/immediate) destination register operands. ... LDRD<c> <Rt>, <Rt2>, <label> LDRD<c> <Rt>, <Rt2>, [<Rn>{, #+/-<imm>}] LDRD<c> <Rt>, <Rt2>, [<Rn>], #+/-<imm> LDRD<c> <Rt>, <Rt2>, [<Rn>, #+/-<imm>]! As specified in A8.8.72/A8.8.73 in the ARM ARM, the T1 encoding has a constraint which enforces that Rt != Rt2. If this constraint is not met the result of executing the instruction will be unpredictable. Fixes rdar://14479780. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191504 91177308-0d34-0410-b5e6-96231b3b80d8		2013-09-27 10:30:18 +00:00
..
AArch64	Initial support for Neon scalar instructions.	2013-09-24 02:47:27 +00:00
ARM	ARM: Teach assembler to enforce constraint for Thumb2 LDRD (literal/immediate) destination register operands.	2013-09-27 10:30:18 +00:00
AsmParser	MCParser/Debug info: Accept line number 0 as a legitimate value, since	2013-09-26 23:37:11 +00:00
COFF	COFF: Ensure that objects produced by LLVM link with /safeseh	2013-09-17 23:18:05 +00:00
Disassembler	Fixing Intel format of the vshufpd instruction.	2013-09-27 01:44:23 +00:00
ELF	Implements parsing and emitting of .cfi_window_save in MC.	2013-09-26 14:49:40 +00:00
MachO	Fixed a crash in the integrated assembler for Mach-O when a symbol difference	2013-09-05 20:25:06 +00:00
Markup	MC: Simple example parser for MC assembly markup.	2012-10-31 23:24:13 +00:00
Mips	[mips][msa] Direct Object Emission for 3RF instructions.	2013-09-26 21:31:43 +00:00
PowerPC	PPC: Allow partial fills in writeNopData()	2013-09-26 09:18:48 +00:00
SystemZ	[SystemZ] Add unsigned compare-and-branch instructions	2013-09-18 09:56:40 +00:00
X86	Fixing Intel format of the vshufpd instruction.	2013-09-27 01:44:23 +00:00