llvm-6502/lib/Target/SystemZ/SystemZRegisterInfo.h
Richard Sandiford 745ca1eed7 [SystemZ] Rename subregs and add subreg_h32
Use subreg_hNN and subreg_lNN for the high and low NN bits of a register.
List the low registers first, so that subreg_l32 also means the low 32
bits of a 128-bit register.

Floats are stored in the upper 32 bits of a 64-bit register, so they
should use subreg_h32 rather than subreg_l32.

No behavioral change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191659 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-30 10:28:35 +00:00

69 lines
2.0 KiB
C++

//===-- SystemZRegisterInfo.h - SystemZ register information ----*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
#ifndef SystemZREGISTERINFO_H
#define SystemZREGISTERINFO_H
#include "SystemZ.h"
#include "llvm/Target/TargetRegisterInfo.h"
#define GET_REGINFO_HEADER
#include "SystemZGenRegisterInfo.inc"
namespace llvm {
namespace SystemZ {
// Return the subreg to use for referring to the even and odd registers
// in a GR128 pair. Is32Bit says whether we want a GR32 or GR64.
inline unsigned even128(bool Is32bit) {
return Is32bit ? subreg_hl32 : subreg_h64;
}
inline unsigned odd128(bool Is32bit) {
return Is32bit ? subreg_l32 : subreg_l64;
}
}
class SystemZSubtarget;
class SystemZInstrInfo;
struct SystemZRegisterInfo : public SystemZGenRegisterInfo {
private:
SystemZTargetMachine &TM;
public:
SystemZRegisterInfo(SystemZTargetMachine &tm);
// Override TargetRegisterInfo.h.
virtual bool requiresRegisterScavenging(const MachineFunction &MF) const
LLVM_OVERRIDE {
return true;
}
virtual bool requiresFrameIndexScavenging(const MachineFunction &MF) const
LLVM_OVERRIDE {
return true;
}
virtual bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const
LLVM_OVERRIDE {
return true;
}
virtual const uint16_t *getCalleeSavedRegs(const MachineFunction *MF = 0)
const LLVM_OVERRIDE;
virtual BitVector getReservedRegs(const MachineFunction &MF)
const LLVM_OVERRIDE;
virtual void eliminateFrameIndex(MachineBasicBlock::iterator MI,
int SPAdj, unsigned FIOperandNum,
RegScavenger *RS) const LLVM_OVERRIDE;
virtual unsigned getFrameRegister(const MachineFunction &MF) const
LLVM_OVERRIDE;
};
} // end namespace llvm
#endif