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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5182 91177308-0d34-0410-b5e6-96231b3b80d8
54 lines
2.2 KiB
C++
54 lines
2.2 KiB
C++
//===-- X86InstrBuilder.h - Functions to aid building x86 insts -*- C++ -*-===//
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//
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// This file exposes functions that may be used with BuildMI from the
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// MachineInstrBuilder.h file to handle X86'isms in a clean way.
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//
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// The BuildMem function may be used with the BuildMI function to add entire
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// memory references in a single, typed, function call. X86 memory references
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// can be very complex expressions (described in the README), so wrapping them
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// up behind an easier to use interface makes sense. Descriptions of the
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// functions are included below.
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//
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// For reference, the order of operands for memory references is:
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// (Operand), Base, Scale, Index, Displacement.
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//
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//===----------------------------------------------------------------------===//
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#ifndef X86INSTRBUILDER_H
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#define X86INSTRBUILDER_H
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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/// addDirectMem - This function is used to add a direct memory reference to the
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/// current instruction -- that is, a dereference of an address in a register,
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/// with no scale, index or displacement. An example is: DWORD PTR [EAX].
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///
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inline const MachineInstrBuilder &addDirectMem(const MachineInstrBuilder &MIB,
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unsigned Reg) {
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// Because memory references are always represented with four
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// values, this adds: Reg, [1, NoReg, 0] to the instruction.
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return MIB.addReg(Reg).addZImm(1).addMReg(0).addSImm(0);
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}
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/// addRegOffset - This function is used to add a memory reference of the form
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/// [Reg + Offset], i.e., one with no scale or index, but with a
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/// displacement. An example is: DWORD PTR [EAX + 4].
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///
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inline const MachineInstrBuilder &addRegOffset(const MachineInstrBuilder &MIB,
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unsigned Reg, int Offset) {
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return MIB.addReg(Reg).addZImm(1).addMReg(0).addSImm(Offset);
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}
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/// addFrameReference - This function is used to add a reference to the base of
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/// an abstract object on the stack frame of the current function. This
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/// reference has base register <noreg> and a FrameIndex offset until it is
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/// resolved.
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///
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inline const MachineInstrBuilder &
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addFrameReference(const MachineInstrBuilder &MIB, int FI) {
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return MIB.addReg(0).addZImm(1).addMReg(0).addFrameIndex(FI);
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}
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#endif
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