mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-07 12:07:17 +00:00
00e08fcaa0
Add header guards to files that were missing guards. Remove #endif comments as they don't seem common in LLVM (we can easily add them back if we decide they're useful) Changes made by clang-tidy with minor tweaks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215558 91177308-0d34-0410-b5e6-96231b3b80d8
39 lines
1.2 KiB
C++
39 lines
1.2 KiB
C++
//===- Thumb2RegisterInfo.h - Thumb-2 Register Information Impl -*- C++ -*-===//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
//
|
|
// This file contains the Thumb-2 implementation of the TargetRegisterInfo
|
|
// class.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#ifndef LLVM_LIB_TARGET_ARM_THUMB2REGISTERINFO_H
|
|
#define LLVM_LIB_TARGET_ARM_THUMB2REGISTERINFO_H
|
|
|
|
#include "ARMBaseRegisterInfo.h"
|
|
|
|
namespace llvm {
|
|
|
|
class ARMSubtarget;
|
|
|
|
struct Thumb2RegisterInfo : public ARMBaseRegisterInfo {
|
|
public:
|
|
Thumb2RegisterInfo(const ARMSubtarget &STI);
|
|
|
|
/// emitLoadConstPool - Emits a load from constpool to materialize the
|
|
/// specified immediate.
|
|
void
|
|
emitLoadConstPool(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
|
|
DebugLoc dl, unsigned DestReg, unsigned SubIdx, int Val,
|
|
ARMCC::CondCodes Pred = ARMCC::AL, unsigned PredReg = 0,
|
|
unsigned MIFlags = MachineInstr::NoFlags) const override;
|
|
};
|
|
}
|
|
|
|
#endif
|