llvm-6502/lib/Target/PowerPC/MCTargetDesc/PPCFixupKinds.h
Adhemerval Zanella aa71428378 Initial TOC support for PowerPC64 object creation
This patch adds initial PPC64 TOC MC object creation using the small mcmodel
(a single 64K TOC) adding the some TOC relocations (R_PPC64_TOC,
R_PPC64_TOC16, and R_PPC64_TOC16DS).

The addition of 'undefinedExplicitRelSym' hook on 'MCELFObjectTargetWriter'
is meant to avoid the creation of an unreferenced ".TOC." symbol (used in
the .odp creation) as well to set the R_PPC64_TOC relocation target as the
temporary ".TOC." symbol. On PPC64 ABI, the R_PPC64_TOC relocation should
not point to any symbol.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166677 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-25 12:27:42 +00:00

56 lines
1.5 KiB
C++

//===-- PPCFixupKinds.h - PPC Specific Fixup Entries ------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_PPC_PPCFIXUPKINDS_H
#define LLVM_PPC_PPCFIXUPKINDS_H
#include "llvm/MC/MCFixup.h"
namespace llvm {
namespace PPC {
enum Fixups {
// fixup_ppc_br24 - 24-bit PC relative relocation for direct branches like 'b'
// and 'bl'.
fixup_ppc_br24 = FirstTargetFixupKind,
/// fixup_ppc_brcond14 - 14-bit PC relative relocation for conditional
/// branches.
fixup_ppc_brcond14,
/// fixup_ppc_lo16 - A 16-bit fixup corresponding to lo16(_foo) for instrs
/// like 'li'.
fixup_ppc_lo16,
/// fixup_ppc_ha16 - A 16-bit fixup corresponding to ha16(_foo) for instrs
/// like 'lis'.
fixup_ppc_ha16,
/// fixup_ppc_lo14 - A 14-bit fixup corresponding to lo16(_foo) for instrs
/// like 'std'.
fixup_ppc_lo14,
/// fixup_ppc_toc - Insert value of TOC base (.TOC.).
fixup_ppc_toc,
/// fixup_ppc_toc16 - A 16-bit signed fixup relative to the TOC base.
fixup_ppc_toc16,
/// fixup_ppc_toc16_ds - A 14-bit signed fixup relative to the TOC base with
/// implied 2 zero bits
fixup_ppc_toc16_ds,
// Marker
LastTargetFixupKind,
NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind
};
}
}
#endif