llvm-6502/test/CodeGen
Jakob Stoklund Olesen 618eda7a60 Add support for the abs64 SPARC v9 code model.
For when 16 TB just isn't enough.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179474 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-14 05:10:36 +00:00
..
AArch64 Replace coff-/elf-dump with llvm-readobj 2013-04-12 04:06:46 +00:00
ARM Replace coff-/elf-dump with llvm-readobj 2013-04-12 04:06:46 +00:00
CPP test commit: remove blank line. 2013-03-14 05:43:59 +00:00
Generic XFAIL some of the generic CodeGen tests for Hexagon. 2013-03-25 21:04:16 +00:00
Hexagon Hexagon: Enable SupportDebugInfomation and DwarfInSection flags. 2013-03-28 19:34:49 +00:00
Inputs Revert "Adding DIImportedModules to DIScopes." 2013-03-28 02:44:59 +00:00
MBlaze Remove unnecessary leading comment characters in lit-only file 2013-03-18 22:08:16 +00:00
Mips [mips] Reapply r179420 and r179421. 2013-04-13 00:55:41 +00:00
MSP430 Remove unnecessary leading comment characters in lit-only file 2013-03-18 22:08:16 +00:00
NVPTX [NVPTX] Remove support for SM < 2.0. This was never fully supported anyway. 2013-03-30 14:29:30 +00:00
PowerPC Spill and restore PPC CR registers using the FP when we have one 2013-04-13 08:09:20 +00:00
R600 R600/SI: Add pattern for AMDGPUurecip 2013-04-10 17:17:56 +00:00
SI Add R600 backend 2012-12-11 21:25:42 +00:00
SPARC Add support for the abs64 SPARC v9 code model. 2013-04-14 05:10:36 +00:00
Thumb Revert "Adding DIImportedModules to DIScopes." 2013-03-28 02:44:59 +00:00
Thumb2 SDAG: Handle scalarizing an extend of a <1 x iN> vector. 2013-03-07 05:47:54 +00:00
X86 Further generalize this scheduler test. 2013-04-13 07:37:27 +00:00
XCore Remove unnecessary leading comment characters in lit-only file 2013-03-18 22:08:16 +00:00