llvm-6502/test/CodeGen/ARM/2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP.ll
Tim Northover 52f83a9ab3 ARM: simplify and extend byval handling
The main issue being fixed here is that APCS targets handling a "byval align N"
parameter with N > 4 were miscounting what objects were where on the stack,
leading to FrameLowering setting the frame pointer incorrectly and clobbering
the stack.

But byval handling had grown over many years, and had multiple layers of cruft
trying to compensate for each other and calculate padding correctly. This only
really needs to be done once, in the HandleByVal function. Elsewhere should
just do what it's told by that call.

I also stripped out unnecessary APCS/AAPCS distinctions (now that Clang emits
byvals with the correct C ABI alignment), which simplified HandleByVal.

rdar://20095672

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231959 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-11 18:54:22 +00:00

50 lines
1.5 KiB
LLVM

;Check AAPCS, 5.5 Parameters Passing, C4 and C5 rules.
;Check case when NSAA != 0, and NCRN < R4, NCRN+ParamSize < R4
;RUN: llc -mtriple=thumbv7-linux-gnueabihf -float-abi=hard < %s | FileCheck %s
%st_t = type { i32, i32 }
@static_val = constant %st_t { i32 777, i32 888}
declare void @fooUseStruct(%st_t*)
define void @foo(double %vfp0, ; --> D0, NSAA=SP
double %vfp1, ; --> D1, NSAA=SP
double %vfp2, ; --> D2, NSAA=SP
double %vfp3, ; --> D3, NSAA=SP
double %vfp4, ; --> D4, NSAA=SP
double %vfp5, ; --> D5, NSAA=SP
double %vfp6, ; --> D6, NSAA=SP
double %vfp7, ; --> D7, NSAA=SP
double %vfp8, ; --> SP, NSAA=SP+8 (!)
i32 %p0, ; --> R0, NSAA=SP+8
%st_t* byval %p1, ; --> R1, R2, NSAA=SP+8
i32 %p2, ; --> R3, NSAA=SP+8
i32 %p3) #0 { ; --> SP+4, NSAA=SP+12
entry:
;CHECK: sub sp, #12
;CHECK: push.w {r11, lr}
;CHECK: sub sp, #4
;CHECK: add r0, sp, #12
;CHECK: str r2, [sp, #16]
;CHECK: str r1, [sp, #12]
;CHECK: bl fooUseStruct
call void @fooUseStruct(%st_t* %p1)
ret void
}
define void @doFoo() {
entry:
call void @foo(double 23.0,
double 23.1,
double 23.2,
double 23.3,
double 23.4,
double 23.5,
double 23.6,
double 23.7,
double 23.8,
i32 0, %st_t* byval @static_val, i32 1, i32 2)
ret void
}