llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-03-08 19:36:02 +00:00

History

Bill Wendling ab55ebda1c Redo the arithmetic with overflow architecture. I was changing the semantics of

ISD::ADD to emit an implicit EFLAGS. This was horribly broken. Instead, replace
the intrinsic with an ISD::SADDO node. Then custom lower that into an
X86ISD::ADD node with a associated SETCC that checks the correct condition code
(overflow or carry). Then that gets lowered into the correct X86::ADDOvf
instruction.

Similar for SUB and MUL instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60915 91177308-0d34-0410-b5e6-96231b3b80d8

2008-12-12 00:56:36 +00:00

Analysis

Sneaky, sneaky: move the -1 to the outside of the SMax. Reinstate the

2008-12-11 17:40:14 +00:00