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This only affects targets like Mips where branch instructions may kill virtual registers. Most other targets branch on flag values, so virtual registers are not involved. The problem is that MachineBasicBlock::updateTerminator deletes branches and inserts new ones while LiveVariables keeps a list of pointers to instructions that kill virtual registers. That list wasn't properly updated in MBB::SplitCriticalEdge. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132298 91177308-0d34-0410-b5e6-96231b3b80d8
728 lines
25 KiB
C++
728 lines
25 KiB
C++
//===-- llvm/CodeGen/MachineBasicBlock.cpp ----------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// Collect the sequence of machine instructions for a basic block.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/BasicBlock.h"
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#include "llvm/CodeGen/LiveVariables.h"
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineLoopInfo.h"
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#include "llvm/CodeGen/SlotIndexes.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include "llvm/Target/TargetData.h"
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#include "llvm/Target/TargetInstrDesc.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Assembly/Writer.h"
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#include "llvm/ADT/SmallString.h"
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#include "llvm/ADT/SmallPtrSet.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/LeakDetector.h"
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#include "llvm/Support/raw_ostream.h"
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#include <algorithm>
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using namespace llvm;
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MachineBasicBlock::MachineBasicBlock(MachineFunction &mf, const BasicBlock *bb)
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: BB(bb), Number(-1), xParent(&mf), Alignment(0), IsLandingPad(false),
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AddressTaken(false) {
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Insts.Parent = this;
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}
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MachineBasicBlock::~MachineBasicBlock() {
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LeakDetector::removeGarbageObject(this);
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}
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/// getSymbol - Return the MCSymbol for this basic block.
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///
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MCSymbol *MachineBasicBlock::getSymbol() const {
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const MachineFunction *MF = getParent();
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MCContext &Ctx = MF->getContext();
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const char *Prefix = Ctx.getAsmInfo().getPrivateGlobalPrefix();
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return Ctx.GetOrCreateSymbol(Twine(Prefix) + "BB" +
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Twine(MF->getFunctionNumber()) + "_" +
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Twine(getNumber()));
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}
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raw_ostream &llvm::operator<<(raw_ostream &OS, const MachineBasicBlock &MBB) {
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MBB.print(OS);
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return OS;
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}
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/// addNodeToList (MBB) - When an MBB is added to an MF, we need to update the
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/// parent pointer of the MBB, the MBB numbering, and any instructions in the
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/// MBB to be on the right operand list for registers.
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///
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/// MBBs start out as #-1. When a MBB is added to a MachineFunction, it
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/// gets the next available unique MBB number. If it is removed from a
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/// MachineFunction, it goes back to being #-1.
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void ilist_traits<MachineBasicBlock>::addNodeToList(MachineBasicBlock *N) {
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MachineFunction &MF = *N->getParent();
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N->Number = MF.addToMBBNumbering(N);
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// Make sure the instructions have their operands in the reginfo lists.
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MachineRegisterInfo &RegInfo = MF.getRegInfo();
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for (MachineBasicBlock::iterator I = N->begin(), E = N->end(); I != E; ++I)
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I->AddRegOperandsToUseLists(RegInfo);
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LeakDetector::removeGarbageObject(N);
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}
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void ilist_traits<MachineBasicBlock>::removeNodeFromList(MachineBasicBlock *N) {
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N->getParent()->removeFromMBBNumbering(N->Number);
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N->Number = -1;
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LeakDetector::addGarbageObject(N);
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}
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/// addNodeToList (MI) - When we add an instruction to a basic block
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/// list, we update its parent pointer and add its operands from reg use/def
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/// lists if appropriate.
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void ilist_traits<MachineInstr>::addNodeToList(MachineInstr *N) {
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assert(N->getParent() == 0 && "machine instruction already in a basic block");
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N->setParent(Parent);
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// Add the instruction's register operands to their corresponding
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// use/def lists.
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MachineFunction *MF = Parent->getParent();
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N->AddRegOperandsToUseLists(MF->getRegInfo());
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LeakDetector::removeGarbageObject(N);
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}
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/// removeNodeFromList (MI) - When we remove an instruction from a basic block
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/// list, we update its parent pointer and remove its operands from reg use/def
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/// lists if appropriate.
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void ilist_traits<MachineInstr>::removeNodeFromList(MachineInstr *N) {
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assert(N->getParent() != 0 && "machine instruction not in a basic block");
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// Remove from the use/def lists.
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N->RemoveRegOperandsFromUseLists();
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N->setParent(0);
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LeakDetector::addGarbageObject(N);
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}
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/// transferNodesFromList (MI) - When moving a range of instructions from one
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/// MBB list to another, we need to update the parent pointers and the use/def
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/// lists.
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void ilist_traits<MachineInstr>::
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transferNodesFromList(ilist_traits<MachineInstr> &fromList,
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MachineBasicBlock::iterator first,
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MachineBasicBlock::iterator last) {
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assert(Parent->getParent() == fromList.Parent->getParent() &&
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"MachineInstr parent mismatch!");
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// Splice within the same MBB -> no change.
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if (Parent == fromList.Parent) return;
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// If splicing between two blocks within the same function, just update the
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// parent pointers.
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for (; first != last; ++first)
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first->setParent(Parent);
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}
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void ilist_traits<MachineInstr>::deleteNode(MachineInstr* MI) {
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assert(!MI->getParent() && "MI is still in a block!");
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Parent->getParent()->DeleteMachineInstr(MI);
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}
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MachineBasicBlock::iterator MachineBasicBlock::getFirstNonPHI() {
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iterator I = begin();
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while (I != end() && I->isPHI())
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++I;
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return I;
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}
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MachineBasicBlock::iterator
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MachineBasicBlock::SkipPHIsAndLabels(MachineBasicBlock::iterator I) {
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while (I != end() && (I->isPHI() || I->isLabel() || I->isDebugValue()))
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++I;
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return I;
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}
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MachineBasicBlock::iterator MachineBasicBlock::getFirstTerminator() {
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iterator I = end();
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while (I != begin() && ((--I)->getDesc().isTerminator() || I->isDebugValue()))
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; /*noop */
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while (I != end() && !I->getDesc().isTerminator())
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++I;
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return I;
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}
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MachineBasicBlock::iterator MachineBasicBlock::getLastNonDebugInstr() {
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iterator B = begin(), I = end();
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while (I != B) {
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--I;
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if (I->isDebugValue())
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continue;
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return I;
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}
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// The block is all debug values.
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return end();
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}
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const MachineBasicBlock *MachineBasicBlock::getLandingPadSuccessor() const {
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// A block with a landing pad successor only has one other successor.
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if (succ_size() > 2)
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return 0;
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for (const_succ_iterator I = succ_begin(), E = succ_end(); I != E; ++I)
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if ((*I)->isLandingPad())
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return *I;
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return 0;
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}
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void MachineBasicBlock::dump() const {
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print(dbgs());
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}
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StringRef MachineBasicBlock::getName() const {
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if (const BasicBlock *LBB = getBasicBlock())
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return LBB->getName();
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else
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return "(null)";
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}
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void MachineBasicBlock::print(raw_ostream &OS, SlotIndexes *Indexes) const {
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const MachineFunction *MF = getParent();
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if (!MF) {
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OS << "Can't print out MachineBasicBlock because parent MachineFunction"
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<< " is null\n";
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return;
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}
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if (Alignment) { OS << "Alignment " << Alignment << "\n"; }
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if (Indexes)
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OS << Indexes->getMBBStartIdx(this) << '\t';
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OS << "BB#" << getNumber() << ": ";
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const char *Comma = "";
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if (const BasicBlock *LBB = getBasicBlock()) {
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OS << Comma << "derived from LLVM BB ";
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WriteAsOperand(OS, LBB, /*PrintType=*/false);
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Comma = ", ";
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}
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if (isLandingPad()) { OS << Comma << "EH LANDING PAD"; Comma = ", "; }
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if (hasAddressTaken()) { OS << Comma << "ADDRESS TAKEN"; Comma = ", "; }
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OS << '\n';
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const TargetRegisterInfo *TRI = MF->getTarget().getRegisterInfo();
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if (!livein_empty()) {
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if (Indexes) OS << '\t';
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OS << " Live Ins:";
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for (livein_iterator I = livein_begin(),E = livein_end(); I != E; ++I)
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OS << ' ' << PrintReg(*I, TRI);
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OS << '\n';
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}
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// Print the preds of this block according to the CFG.
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if (!pred_empty()) {
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if (Indexes) OS << '\t';
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OS << " Predecessors according to CFG:";
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for (const_pred_iterator PI = pred_begin(), E = pred_end(); PI != E; ++PI)
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OS << " BB#" << (*PI)->getNumber();
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OS << '\n';
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}
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for (const_iterator I = begin(); I != end(); ++I) {
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if (Indexes) {
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if (Indexes->hasIndex(I))
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OS << Indexes->getInstructionIndex(I);
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OS << '\t';
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}
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OS << '\t';
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I->print(OS, &getParent()->getTarget());
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}
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// Print the successors of this block according to the CFG.
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if (!succ_empty()) {
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if (Indexes) OS << '\t';
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OS << " Successors according to CFG:";
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for (const_succ_iterator SI = succ_begin(), E = succ_end(); SI != E; ++SI)
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OS << " BB#" << (*SI)->getNumber();
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OS << '\n';
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}
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}
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void MachineBasicBlock::removeLiveIn(unsigned Reg) {
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std::vector<unsigned>::iterator I =
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std::find(LiveIns.begin(), LiveIns.end(), Reg);
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assert(I != LiveIns.end() && "Not a live in!");
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LiveIns.erase(I);
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}
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bool MachineBasicBlock::isLiveIn(unsigned Reg) const {
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livein_iterator I = std::find(livein_begin(), livein_end(), Reg);
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return I != livein_end();
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}
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void MachineBasicBlock::moveBefore(MachineBasicBlock *NewAfter) {
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getParent()->splice(NewAfter, this);
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}
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void MachineBasicBlock::moveAfter(MachineBasicBlock *NewBefore) {
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MachineFunction::iterator BBI = NewBefore;
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getParent()->splice(++BBI, this);
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}
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void MachineBasicBlock::updateTerminator() {
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const TargetInstrInfo *TII = getParent()->getTarget().getInstrInfo();
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// A block with no successors has no concerns with fall-through edges.
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if (this->succ_empty()) return;
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MachineBasicBlock *TBB = 0, *FBB = 0;
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SmallVector<MachineOperand, 4> Cond;
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DebugLoc dl; // FIXME: this is nowhere
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bool B = TII->AnalyzeBranch(*this, TBB, FBB, Cond);
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(void) B;
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assert(!B && "UpdateTerminators requires analyzable predecessors!");
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if (Cond.empty()) {
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if (TBB) {
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// The block has an unconditional branch. If its successor is now
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// its layout successor, delete the branch.
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if (isLayoutSuccessor(TBB))
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TII->RemoveBranch(*this);
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} else {
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// The block has an unconditional fallthrough. If its successor is not
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// its layout successor, insert a branch.
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TBB = *succ_begin();
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if (!isLayoutSuccessor(TBB))
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TII->InsertBranch(*this, TBB, 0, Cond, dl);
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}
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} else {
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if (FBB) {
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// The block has a non-fallthrough conditional branch. If one of its
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// successors is its layout successor, rewrite it to a fallthrough
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// conditional branch.
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if (isLayoutSuccessor(TBB)) {
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if (TII->ReverseBranchCondition(Cond))
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return;
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TII->RemoveBranch(*this);
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TII->InsertBranch(*this, FBB, 0, Cond, dl);
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} else if (isLayoutSuccessor(FBB)) {
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TII->RemoveBranch(*this);
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TII->InsertBranch(*this, TBB, 0, Cond, dl);
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}
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} else {
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// The block has a fallthrough conditional branch.
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MachineBasicBlock *MBBA = *succ_begin();
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MachineBasicBlock *MBBB = *llvm::next(succ_begin());
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if (MBBA == TBB) std::swap(MBBB, MBBA);
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if (isLayoutSuccessor(TBB)) {
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if (TII->ReverseBranchCondition(Cond)) {
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// We can't reverse the condition, add an unconditional branch.
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Cond.clear();
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TII->InsertBranch(*this, MBBA, 0, Cond, dl);
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return;
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}
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TII->RemoveBranch(*this);
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TII->InsertBranch(*this, MBBA, 0, Cond, dl);
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} else if (!isLayoutSuccessor(MBBA)) {
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TII->RemoveBranch(*this);
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TII->InsertBranch(*this, TBB, MBBA, Cond, dl);
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}
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}
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}
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}
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void MachineBasicBlock::addSuccessor(MachineBasicBlock *succ) {
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Successors.push_back(succ);
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succ->addPredecessor(this);
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}
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void MachineBasicBlock::removeSuccessor(MachineBasicBlock *succ) {
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succ->removePredecessor(this);
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succ_iterator I = std::find(Successors.begin(), Successors.end(), succ);
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assert(I != Successors.end() && "Not a current successor!");
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Successors.erase(I);
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}
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MachineBasicBlock::succ_iterator
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MachineBasicBlock::removeSuccessor(succ_iterator I) {
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assert(I != Successors.end() && "Not a current successor!");
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(*I)->removePredecessor(this);
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return Successors.erase(I);
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}
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void MachineBasicBlock::addPredecessor(MachineBasicBlock *pred) {
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Predecessors.push_back(pred);
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}
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void MachineBasicBlock::removePredecessor(MachineBasicBlock *pred) {
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pred_iterator I = std::find(Predecessors.begin(), Predecessors.end(), pred);
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assert(I != Predecessors.end() && "Pred is not a predecessor of this block!");
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Predecessors.erase(I);
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}
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void MachineBasicBlock::transferSuccessors(MachineBasicBlock *fromMBB) {
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if (this == fromMBB)
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return;
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while (!fromMBB->succ_empty()) {
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MachineBasicBlock *Succ = *fromMBB->succ_begin();
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addSuccessor(Succ);
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fromMBB->removeSuccessor(Succ);
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}
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}
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void
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MachineBasicBlock::transferSuccessorsAndUpdatePHIs(MachineBasicBlock *fromMBB) {
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if (this == fromMBB)
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return;
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while (!fromMBB->succ_empty()) {
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MachineBasicBlock *Succ = *fromMBB->succ_begin();
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addSuccessor(Succ);
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fromMBB->removeSuccessor(Succ);
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// Fix up any PHI nodes in the successor.
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for (MachineBasicBlock::iterator MI = Succ->begin(), ME = Succ->end();
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MI != ME && MI->isPHI(); ++MI)
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for (unsigned i = 2, e = MI->getNumOperands()+1; i != e; i += 2) {
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MachineOperand &MO = MI->getOperand(i);
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if (MO.getMBB() == fromMBB)
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MO.setMBB(this);
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}
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}
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}
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bool MachineBasicBlock::isSuccessor(const MachineBasicBlock *MBB) const {
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const_succ_iterator I = std::find(Successors.begin(), Successors.end(), MBB);
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return I != Successors.end();
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}
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bool MachineBasicBlock::isLayoutSuccessor(const MachineBasicBlock *MBB) const {
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MachineFunction::const_iterator I(this);
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return llvm::next(I) == MachineFunction::const_iterator(MBB);
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}
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bool MachineBasicBlock::canFallThrough() {
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MachineFunction::iterator Fallthrough = this;
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++Fallthrough;
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// If FallthroughBlock is off the end of the function, it can't fall through.
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if (Fallthrough == getParent()->end())
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return false;
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// If FallthroughBlock isn't a successor, no fallthrough is possible.
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if (!isSuccessor(Fallthrough))
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return false;
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// Analyze the branches, if any, at the end of the block.
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MachineBasicBlock *TBB = 0, *FBB = 0;
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SmallVector<MachineOperand, 4> Cond;
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const TargetInstrInfo *TII = getParent()->getTarget().getInstrInfo();
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if (TII->AnalyzeBranch(*this, TBB, FBB, Cond)) {
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// If we couldn't analyze the branch, examine the last instruction.
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// If the block doesn't end in a known control barrier, assume fallthrough
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// is possible. The isPredicable check is needed because this code can be
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// called during IfConversion, where an instruction which is normally a
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// Barrier is predicated and thus no longer an actual control barrier. This
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// is over-conservative though, because if an instruction isn't actually
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// predicated we could still treat it like a barrier.
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return empty() || !back().getDesc().isBarrier() ||
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back().getDesc().isPredicable();
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}
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// If there is no branch, control always falls through.
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if (TBB == 0) return true;
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// If there is some explicit branch to the fallthrough block, it can obviously
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// reach, even though the branch should get folded to fall through implicitly.
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if (MachineFunction::iterator(TBB) == Fallthrough ||
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MachineFunction::iterator(FBB) == Fallthrough)
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return true;
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// If it's an unconditional branch to some block not the fall through, it
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// doesn't fall through.
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if (Cond.empty()) return false;
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// Otherwise, if it is conditional and has no explicit false block, it falls
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// through.
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return FBB == 0;
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}
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MachineBasicBlock *
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MachineBasicBlock::SplitCriticalEdge(MachineBasicBlock *Succ, Pass *P) {
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MachineFunction *MF = getParent();
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DebugLoc dl; // FIXME: this is nowhere
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// We may need to update this's terminator, but we can't do that if
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// AnalyzeBranch fails. If this uses a jump table, we won't touch it.
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const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
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MachineBasicBlock *TBB = 0, *FBB = 0;
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SmallVector<MachineOperand, 4> Cond;
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if (TII->AnalyzeBranch(*this, TBB, FBB, Cond))
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return NULL;
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// Avoid bugpoint weirdness: A block may end with a conditional branch but
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// jumps to the same MBB is either case. We have duplicate CFG edges in that
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// case that we can't handle. Since this never happens in properly optimized
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// code, just skip those edges.
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if (TBB && TBB == FBB) {
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DEBUG(dbgs() << "Won't split critical edge after degenerate BB#"
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|
<< getNumber() << '\n');
|
|
return NULL;
|
|
}
|
|
|
|
MachineBasicBlock *NMBB = MF->CreateMachineBasicBlock();
|
|
MF->insert(llvm::next(MachineFunction::iterator(this)), NMBB);
|
|
DEBUG(dbgs() << "Splitting critical edge:"
|
|
" BB#" << getNumber()
|
|
<< " -- BB#" << NMBB->getNumber()
|
|
<< " -- BB#" << Succ->getNumber() << '\n');
|
|
|
|
// On some targets like Mips, branches may kill virtual registers. Make sure
|
|
// that LiveVariables is properly updated after updateTerminator replaces the
|
|
// terminators.
|
|
LiveVariables *LV = P->getAnalysisIfAvailable<LiveVariables>();
|
|
|
|
// Collect a list of virtual registers killed by the terminators.
|
|
SmallVector<unsigned, 4> KilledRegs;
|
|
if (LV)
|
|
for (iterator I = getFirstTerminator(), E = end(); I != E; ++I) {
|
|
MachineInstr *MI = I;
|
|
for (MachineInstr::mop_iterator OI = MI->operands_begin(),
|
|
OE = MI->operands_end(); OI != OE; ++OI) {
|
|
if (!OI->isReg() || !OI->isUse() || !OI->isKill() || OI->isUndef())
|
|
continue;
|
|
unsigned Reg = OI->getReg();
|
|
if (TargetRegisterInfo::isVirtualRegister(Reg) &&
|
|
LV->getVarInfo(Reg).removeKill(MI)) {
|
|
KilledRegs.push_back(Reg);
|
|
DEBUG(dbgs() << "Removing terminator kill: " << *MI);
|
|
OI->setIsKill(false);
|
|
}
|
|
}
|
|
}
|
|
|
|
ReplaceUsesOfBlockWith(Succ, NMBB);
|
|
updateTerminator();
|
|
|
|
// Insert unconditional "jump Succ" instruction in NMBB if necessary.
|
|
NMBB->addSuccessor(Succ);
|
|
if (!NMBB->isLayoutSuccessor(Succ)) {
|
|
Cond.clear();
|
|
MF->getTarget().getInstrInfo()->InsertBranch(*NMBB, Succ, NULL, Cond, dl);
|
|
}
|
|
|
|
// Fix PHI nodes in Succ so they refer to NMBB instead of this
|
|
for (MachineBasicBlock::iterator i = Succ->begin(), e = Succ->end();
|
|
i != e && i->isPHI(); ++i)
|
|
for (unsigned ni = 1, ne = i->getNumOperands(); ni != ne; ni += 2)
|
|
if (i->getOperand(ni+1).getMBB() == this)
|
|
i->getOperand(ni+1).setMBB(NMBB);
|
|
|
|
// Update LiveVariables.
|
|
if (LV) {
|
|
// Restore kills of virtual registers that were killed by the terminators.
|
|
while (!KilledRegs.empty()) {
|
|
unsigned Reg = KilledRegs.pop_back_val();
|
|
for (iterator I = end(), E = begin(); I != E;) {
|
|
if (!(--I)->addRegisterKilled(Reg, NULL, /* addIfNotFound= */ false))
|
|
continue;
|
|
LV->getVarInfo(Reg).Kills.push_back(I);
|
|
DEBUG(dbgs() << "Restored terminator kill: " << *I);
|
|
break;
|
|
}
|
|
}
|
|
// Update relevant live-through information.
|
|
LV->addNewBlock(NMBB, this, Succ);
|
|
}
|
|
|
|
if (MachineDominatorTree *MDT =
|
|
P->getAnalysisIfAvailable<MachineDominatorTree>()) {
|
|
// Update dominator information.
|
|
MachineDomTreeNode *SucccDTNode = MDT->getNode(Succ);
|
|
|
|
bool IsNewIDom = true;
|
|
for (const_pred_iterator PI = Succ->pred_begin(), E = Succ->pred_end();
|
|
PI != E; ++PI) {
|
|
MachineBasicBlock *PredBB = *PI;
|
|
if (PredBB == NMBB)
|
|
continue;
|
|
if (!MDT->dominates(SucccDTNode, MDT->getNode(PredBB))) {
|
|
IsNewIDom = false;
|
|
break;
|
|
}
|
|
}
|
|
|
|
// We know "this" dominates the newly created basic block.
|
|
MachineDomTreeNode *NewDTNode = MDT->addNewBlock(NMBB, this);
|
|
|
|
// If all the other predecessors of "Succ" are dominated by "Succ" itself
|
|
// then the new block is the new immediate dominator of "Succ". Otherwise,
|
|
// the new block doesn't dominate anything.
|
|
if (IsNewIDom)
|
|
MDT->changeImmediateDominator(SucccDTNode, NewDTNode);
|
|
}
|
|
|
|
if (MachineLoopInfo *MLI = P->getAnalysisIfAvailable<MachineLoopInfo>())
|
|
if (MachineLoop *TIL = MLI->getLoopFor(this)) {
|
|
// If one or the other blocks were not in a loop, the new block is not
|
|
// either, and thus LI doesn't need to be updated.
|
|
if (MachineLoop *DestLoop = MLI->getLoopFor(Succ)) {
|
|
if (TIL == DestLoop) {
|
|
// Both in the same loop, the NMBB joins loop.
|
|
DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
|
|
} else if (TIL->contains(DestLoop)) {
|
|
// Edge from an outer loop to an inner loop. Add to the outer loop.
|
|
TIL->addBasicBlockToLoop(NMBB, MLI->getBase());
|
|
} else if (DestLoop->contains(TIL)) {
|
|
// Edge from an inner loop to an outer loop. Add to the outer loop.
|
|
DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
|
|
} else {
|
|
// Edge from two loops with no containment relation. Because these
|
|
// are natural loops, we know that the destination block must be the
|
|
// header of its loop (adding a branch into a loop elsewhere would
|
|
// create an irreducible loop).
|
|
assert(DestLoop->getHeader() == Succ &&
|
|
"Should not create irreducible loops!");
|
|
if (MachineLoop *P = DestLoop->getParentLoop())
|
|
P->addBasicBlockToLoop(NMBB, MLI->getBase());
|
|
}
|
|
}
|
|
}
|
|
|
|
return NMBB;
|
|
}
|
|
|
|
/// removeFromParent - This method unlinks 'this' from the containing function,
|
|
/// and returns it, but does not delete it.
|
|
MachineBasicBlock *MachineBasicBlock::removeFromParent() {
|
|
assert(getParent() && "Not embedded in a function!");
|
|
getParent()->remove(this);
|
|
return this;
|
|
}
|
|
|
|
|
|
/// eraseFromParent - This method unlinks 'this' from the containing function,
|
|
/// and deletes it.
|
|
void MachineBasicBlock::eraseFromParent() {
|
|
assert(getParent() && "Not embedded in a function!");
|
|
getParent()->erase(this);
|
|
}
|
|
|
|
|
|
/// ReplaceUsesOfBlockWith - Given a machine basic block that branched to
|
|
/// 'Old', change the code and CFG so that it branches to 'New' instead.
|
|
void MachineBasicBlock::ReplaceUsesOfBlockWith(MachineBasicBlock *Old,
|
|
MachineBasicBlock *New) {
|
|
assert(Old != New && "Cannot replace self with self!");
|
|
|
|
MachineBasicBlock::iterator I = end();
|
|
while (I != begin()) {
|
|
--I;
|
|
if (!I->getDesc().isTerminator()) break;
|
|
|
|
// Scan the operands of this machine instruction, replacing any uses of Old
|
|
// with New.
|
|
for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i)
|
|
if (I->getOperand(i).isMBB() &&
|
|
I->getOperand(i).getMBB() == Old)
|
|
I->getOperand(i).setMBB(New);
|
|
}
|
|
|
|
// Update the successor information.
|
|
removeSuccessor(Old);
|
|
addSuccessor(New);
|
|
}
|
|
|
|
/// CorrectExtraCFGEdges - Various pieces of code can cause excess edges in the
|
|
/// CFG to be inserted. If we have proven that MBB can only branch to DestA and
|
|
/// DestB, remove any other MBB successors from the CFG. DestA and DestB can be
|
|
/// null.
|
|
///
|
|
/// Besides DestA and DestB, retain other edges leading to LandingPads
|
|
/// (currently there can be only one; we don't check or require that here).
|
|
/// Note it is possible that DestA and/or DestB are LandingPads.
|
|
bool MachineBasicBlock::CorrectExtraCFGEdges(MachineBasicBlock *DestA,
|
|
MachineBasicBlock *DestB,
|
|
bool isCond) {
|
|
// The values of DestA and DestB frequently come from a call to the
|
|
// 'TargetInstrInfo::AnalyzeBranch' method. We take our meaning of the initial
|
|
// values from there.
|
|
//
|
|
// 1. If both DestA and DestB are null, then the block ends with no branches
|
|
// (it falls through to its successor).
|
|
// 2. If DestA is set, DestB is null, and isCond is false, then the block ends
|
|
// with only an unconditional branch.
|
|
// 3. If DestA is set, DestB is null, and isCond is true, then the block ends
|
|
// with a conditional branch that falls through to a successor (DestB).
|
|
// 4. If DestA and DestB is set and isCond is true, then the block ends with a
|
|
// conditional branch followed by an unconditional branch. DestA is the
|
|
// 'true' destination and DestB is the 'false' destination.
|
|
|
|
bool Changed = false;
|
|
|
|
MachineFunction::iterator FallThru =
|
|
llvm::next(MachineFunction::iterator(this));
|
|
|
|
if (DestA == 0 && DestB == 0) {
|
|
// Block falls through to successor.
|
|
DestA = FallThru;
|
|
DestB = FallThru;
|
|
} else if (DestA != 0 && DestB == 0) {
|
|
if (isCond)
|
|
// Block ends in conditional jump that falls through to successor.
|
|
DestB = FallThru;
|
|
} else {
|
|
assert(DestA && DestB && isCond &&
|
|
"CFG in a bad state. Cannot correct CFG edges");
|
|
}
|
|
|
|
// Remove superfluous edges. I.e., those which aren't destinations of this
|
|
// basic block, duplicate edges, or landing pads.
|
|
SmallPtrSet<const MachineBasicBlock*, 8> SeenMBBs;
|
|
MachineBasicBlock::succ_iterator SI = succ_begin();
|
|
while (SI != succ_end()) {
|
|
const MachineBasicBlock *MBB = *SI;
|
|
if (!SeenMBBs.insert(MBB) ||
|
|
(MBB != DestA && MBB != DestB && !MBB->isLandingPad())) {
|
|
// This is a superfluous edge, remove it.
|
|
SI = removeSuccessor(SI);
|
|
Changed = true;
|
|
} else {
|
|
++SI;
|
|
}
|
|
}
|
|
|
|
return Changed;
|
|
}
|
|
|
|
/// findDebugLoc - find the next valid DebugLoc starting at MBBI, skipping
|
|
/// any DBG_VALUE instructions. Return UnknownLoc if there is none.
|
|
DebugLoc
|
|
MachineBasicBlock::findDebugLoc(MachineBasicBlock::iterator &MBBI) {
|
|
DebugLoc DL;
|
|
MachineBasicBlock::iterator E = end();
|
|
if (MBBI != E) {
|
|
// Skip debug declarations, we don't want a DebugLoc from them.
|
|
MachineBasicBlock::iterator MBBI2 = MBBI;
|
|
while (MBBI2 != E && MBBI2->isDebugValue())
|
|
MBBI2++;
|
|
if (MBBI2 != E)
|
|
DL = MBBI2->getDebugLoc();
|
|
}
|
|
return DL;
|
|
}
|
|
|
|
void llvm::WriteAsOperand(raw_ostream &OS, const MachineBasicBlock *MBB,
|
|
bool t) {
|
|
OS << "BB#" << MBB->getNumber();
|
|
}
|
|
|