llvm-6502/test/CodeGen
2013-01-03 08:48:33 +00:00
..
ARM Revert "Adding support for llvm.arm.neon.vaddl[su].* and" 2012-12-20 21:09:38 +00:00
CPP
Generic After reducing the size of an operation in the DAG we zero-extend the reduced 2012-12-19 07:39:08 +00:00
Hexagon
MBlaze
Mips Add test case for r170674 2012-12-21 00:55:10 +00:00
MSP430
NVPTX
PowerPC Support ppcf128 in SelectionDAG::getConstantFP 2012-12-30 19:03:32 +00:00
R600 DAGCombiner: Avoid generating illegal vector INT_TO_FP nodes 2013-01-02 22:13:01 +00:00
SI Add R600 backend 2012-12-11 21:25:42 +00:00
SPARC
Thumb
Thumb2 On some ARM cpus, flags setting movs with shifter operand, i.e. lsl, lsr, asr, 2012-12-20 19:59:30 +00:00
X86 Simplified TRUNCATE operation that comes after SETCC. It is possible since SETCC result is 0 or -1. 2013-01-03 08:48:33 +00:00
XCore