Zoran Jovanovic bb34ce84fd Test case micromips-load-effective-address.s renamed to micromips-load-effective-address.ll and moved to test/CodeGen/Mips. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199221 91177308-0d34-0410-b5e6-96231b3b80d8		2014-01-14 16:26:47 +00:00
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AArch64	[AArch64][NEON] Added UXTL and UXTL2 instruction aliases	2014-01-08 21:02:13 +00:00
ARM	ARM IAS: fix diagnostics of improper qualification	2014-01-12 05:25:44 +00:00
AsmParser	Mark the 64-bit x86 push/pop instructions as In64BitMode. Mark the corresponding 32-bit versions with the same encodings Not64BitMode. Remove hack from tablegen disassembler table emitter. Fix bad test.	2014-01-05 01:35:51 +00:00
COFF	Add the .secidx test I've forgotten to svn add in 197826	2013-12-20 19:06:50 +00:00
Disassembler	[Sparc] Add support for parsing floating point instructions.	2014-01-12 04:48:54 +00:00
ELF	Force emit a relocation for @gnu_indirect_function symbols so that the indirect	2014-01-08 18:50:32 +00:00
MachO	Fixed a bug in getARMFixupKindMachOInfo() where three ARM fixup kinds	2013-12-13 22:46:54 +00:00
Markup
Mips	Test case micromips-load-effective-address.s renamed to micromips-load-effective-address.ll and moved to test/CodeGen/Mips.	2014-01-14 16:26:47 +00:00
PowerPC	Convert another llc -filetype=obj test.	2013-10-28 22:17:19 +00:00
Sparc	[Sparc] Add support for parsing floating point instructions.	2014-01-12 04:48:54 +00:00
SystemZ	[SystemZ] Add MC support for interlocked-access 1 instructions	2013-12-24 15:14:05 +00:00
X86	[x86] Fix retq/retl handling in 64-bit mode	2014-01-13 14:05:59 +00:00