llvm-6502/test/CodeGen/PowerPC
Hal Finkel abdf75511b Loosen scheduling restrictions on the PPC dcbt intrinsic
As with the prefetch intrinsic to which it maps, simply have dcbt
marked as reading from and writing to its arguments instead of having
unmodeled side effects. While this might cause unwanted code motion
(because aliasing checks don't really capture cache-line sharing),
it is more important that prefetches in unrolled loops don't block
the scheduler from rearranging the unrolled loop body.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171073 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25 18:51:18 +00:00
..
2004-11-29-ShrCrash.ll
2004-11-30-shift-crash.ll
2004-11-30-shr-var-crash.ll
2004-12-12-ZeroSizeCommon.ll
2005-01-14-SetSelectCrash.ll
2005-01-14-UndefLong.ll
2005-08-12-rlwimi-crash.ll
2005-09-02-LegalizeDuplicatesCalls.ll
2005-10-08-ArithmeticRotate.ll
2005-11-30-vastart-crash.ll
2006-01-11-darwin-fp-argument.ll
2006-01-20-ShiftPartsCrash.ll
2006-04-01-FloatDoubleExtend.ll
2006-04-05-splat-ish.ll
2006-04-19-vmaddfp-crash.ll
2006-05-12-rlwimi-crash.ll
2006-07-07-ComputeMaskedBits.ll
2006-07-19-stwbrx-crash.ll
2006-08-11-RetVector.ll
2006-08-15-SelectionCrash.ll
2006-09-28-shift_64.ll
2006-10-13-Miscompile.ll
2006-10-17-brcc-miscompile.ll
2006-10-17-ppc64-alloca.ll
2006-11-10-DAGCombineMiscompile.ll
2006-11-29-AltivecFPSplat.ll
2006-12-07-LargeAlloca.ll
2006-12-07-SelectCrash.ll
2007-01-04-ArgExtension.ll
2007-01-15-AsmDialect.ll
2007-01-29-lbrx-asm.ll
2007-01-31-InlineAsmAddrMode.ll
2007-02-16-AlignPacked.ll
2007-02-16-InlineAsmNConstraint.ll
2007-02-23-lr-saved-twice.ll
2007-03-24-cntlzd.ll
2007-03-30-SpillerCrash.ll
2007-04-24-InlineAsm-I-Modifier.ll
2007-04-30-InlineAsmEarlyClobber.ll
2007-05-03-InlineAsm-S-Constraint.ll
2007-05-14-InlineAsmSelectCrash.ll
2007-05-22-tailmerge-3.ll
2007-05-30-dagcombine-miscomp.ll
2007-06-28-BCCISelBug.ll
2007-08-04-CoalescerAssert.ll
2007-09-04-AltivecDST.ll
2007-09-07-LoadStoreIdxForms.ll
2007-09-08-unaligned.ll
2007-09-11-RegCoalescerAssert.ll
2007-09-12-LiveIntervalsAssert.ll
2007-10-16-InlineAsmFrameOffset.ll
2007-10-18-PtrArithmetic.ll
2007-10-21-LocalRegAllocAssert2.ll
2007-10-21-LocalRegAllocAssert.ll
2007-11-04-CoalescerCrash.ll
2007-11-16-landingpad-split.ll
2007-11-19-VectorSplitting.ll
2008-02-05-LiveIntervalsAssert.ll
2008-02-09-LocalRegAllocAssert.ll
2008-03-05-RegScavengerAssert.ll
2008-03-17-RegScavengerCrash.ll
2008-03-18-RegScavengerAssert.ll
2008-03-24-AddressRegImm.ll
2008-03-24-CoalescerBug.ll
2008-03-26-CoalescerBug.ll
2008-04-10-LiveIntervalCrash.ll
2008-04-16-CoalescerBug.ll
2008-04-23-CoalescerCrash.ll Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic. 2011-11-27 06:54:59 +00:00
2008-05-01-ppc_fp128.ll
2008-06-19-LegalizerCrash.ll
2008-06-21-F128LoadStore.ll
2008-06-23-LiveVariablesCrash.ll
2008-07-10-SplatMiscompile.ll
2008-07-15-Bswap.ll
2008-07-15-Fabs.ll
2008-07-15-SignExtendInreg.ll
2008-07-17-Fneg.ll
2008-07-24-PPC64-CCBug.ll
2008-09-12-CoalescerBug.ll
2008-10-17-AsmMatchingOperands.ll
2008-10-28-f128-i32.ll
2008-10-28-UnprocessedNode.ll
2008-10-31-PPCF128Libcalls.ll
2008-12-02-LegalizeTypeAssert.ll
2008-12-12-EH.ll
2009-01-16-DeclareISelBug.ll
2009-03-17-LSRBug.ll
2009-05-28-LegalizeBRCC.ll
2009-07-16-InlineAsm-M-Operand.ll
2009-08-17-inline-asm-addr-mode-breakage.ll
2009-08-23-linkerprivate.ll
2009-09-18-carrybit.ll
2009-11-15-ProcImpDefsBug.ll
2009-11-25-ImpDefBug.ll
2010-02-04-EmptyGlobal.ll
2010-02-12-saveCR.ll
2010-03-09-indirect-call.ll
2010-04-01-MachineCSEBug.ll
2010-04-07-DbgValueOtherTargets.ll
2010-05-03-retaddr1.ll
2010-10-11-Fast-Varargs.ll
2010-12-18-PPCStackRefs.ll
2011-12-05-NoSpillDupCR.ll
2011-12-06-SpillAndRestoreCR.ll
2011-12-08-DemandedBitsMiscompile.ll
2012-09-16-TOC-entry-check.ll
2012-10-11-dynalloc.ll
2012-10-12-bitcast.ll
2012-11-16-mischedcall.ll
a2-fp-basic.ll
addc.ll
addi-reassoc.ll
align.ll
and_add.ll
and_sext.ll
and_sra.ll
and-branch.ll
and-elim.ll
and-imm.ll
asm-Zy.ll
atomic-1.ll
atomic-2.ll
Atomics-32.ll
Atomics-64.ll
available-externally.ll
big-endian-actual-args.ll
big-endian-call-result.ll
big-endian-formal-args.ll
branch-opt.ll
bswap-load-store.ll
buildvec_canonicalize.ll
calls.ll
can-lower-ret.ll
cmp-cmp.ll
coalesce-ext.ll
compare-duplicate.ll
compare-simm.ll
constants.ll
cr1eq-no-extra-moves.ll
cr1eq.ll
cr_spilling.ll
crsave.ll
ctrloop-reg.ll
ctrloop-s000.ll
ctrloop-sums.ll
ctrloops.ll
cttz.ll
darwin-labels.ll
dbg.ll
dcbt-sched.ll
delete-node.ll
div-2.ll
empty-functions.ll
emptystruct.ll
eqv-andc-orc-nor.ll
extsh.ll
fabs.ll
floatPSA.ll
fma.ll
fnabs.ll
fneg.ll
fold-li.ll
fp_to_uint.ll
fp-branch.ll
fp-int-fp.ll
fpcopy.ll
Frames-alloca.ll
Frames-large.ll
Frames-leaf.ll
Frames-small.ll
frounds.ll
fsl-e500mc.ll
fsl-e5500.ll
fsqrt.ll
hello.ll
hidden-vis-2.ll
hidden-vis.ll
i64_fp_round.ll
i64_fp.ll
i128-and-beyond.ll
iabs.ll
illegal-element-type.ll
in-asm-f64-reg.ll
indirectbr.ll
inlineasm-copy.ll
int-fp-conv-0.ll
int-fp-conv-1.ll
inverted-bool-compares.ll
isel.ll
ispositive.ll
itofp128.ll
jaggedstructs.ll
LargeAbsoluteAddr.ll
lbzux.ll
lha.ll
lit.local.cfg
load-constant-addr.ll
long-compare.ll
longdbl-truncate.ll
lsr-postinc-pos.ll
mask64.ll
mcm-1.ll
mcm-2.ll This patch implements medium code model support for 64-bit PowerPC. 2012-11-27 17:35:46 +00:00
mcm-3.ll
mcm-4.ll
mcm-5.ll
mcm-6.ll
mcm-7.ll
mcm-default.ll
mcm-obj.ll
mem_update.ll
mem-rr-addr-mode.ll
misched.ll
mul-neg-power-2.ll
mul-with-overflow.ll
mulhs.ll
mult-alt-generic-powerpc64.ll
mult-alt-generic-powerpc.ll
neg.ll
no-dead-strip.ll
novrsave.ll
or-addressing-mode.ll
ppc64-32bit-addic.ll
ppc64-abi-extend.ll
ppc64-align-long-double.ll
ppc64-calls.ll
ppc64-crash.ll
ppc64-cyclecounter.ll
ppc64-linux-func-size.ll
ppc64-prefetch.ll
ppc64-toc.ll
ppc64-vaarg-int.ll
ppc64-zext.ll
ppc440-fp-basic.ll
ppc440-msync.ll
ppc-prologue.ll
ppc-vaarg-agg.ll
ppcf128-1-opt.ll
ppcf128-1.ll
ppcf128-2.ll
ppcf128-3.ll
ppcf128-4.ll
pr3711_widen_bit.ll
pr12757.ll
pr13641.ll
pr13891.ll
private.ll
reg-coalesce-simple.ll
remat-imm.ll
retaddr.ll
return-val-i128.ll
rlwimi2.ll
rlwimi3.ll
rlwimi-commute.ll
rlwimi-keep-rsh.ll
rlwimi.ll
rlwinm2.ll
rlwinm.ll
rotl-2.ll
rotl-64.ll
rotl.ll
s000-alias-misched.ll
sections.ll
select_lt0.ll
select-cc.ll
setcc_no_zext.ll
seteq-0.ll
shift128.ll
shl_elim.ll
shl_sext.ll
sign_ext_inreg1.ll
small-arguments.ll
stack-protector.ll
stfiwx-2.ll
stfiwx.ll
store-load-fwd.ll
structsinmem.ll
structsinregs.ll
stubs.ll
stwu8.ll
stwu-gta.ll
stwux.ll Add support for generating reg+reg preinc stores on PPC. 2012-06-19 02:34:32 +00:00
subc.ll
tailcall1-64.ll
tailcall1.ll
tailcallpic1.ll
tls-gd-obj.ll
tls-gd.ll
tls-ie-obj.ll
tls-ie.ll This patch improves the 64-bit PowerPC InitialExec TLS support by providing 2012-12-14 17:02:38 +00:00
tls-ld-obj.ll
tls-ld.ll
tls.ll
trampoline.ll
unsafe-math.ll
varargs-struct-float.ll
varargs.ll
vcmp-fold.ll
vec_auto_constant.ll
vec_br_cmp.ll
vec_buildvector_loadstore.ll
vec_call.ll
vec_cmp.ll
vec_constants.ll
vec_conv.ll
vec_extload.ll
vec_fneg.ll
vec_insert.ll
vec_misaligned.ll
vec_mul.ll
vec_perf_shuffle.ll
vec_rounding.ll
vec_select.ll
vec_shift.ll
vec_shuffle.ll
vec_splat_constant.ll
vec_splat.ll
vec_sqrt.ll
vec_vrsave.ll
vec_zero.ll
vector-identity-shuffle.ll
vector.ll
vrspill.ll