llvm-6502/test/CodeGen/Thumb/2012-04-26-M0ISelBug.ll
Evan Cheng da71cca458 Make test less fragile.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155732 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-27 20:48:18 +00:00

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LLVM

; RUN: llc -mtriple=thumbv6-apple-ios -mcpu=cortex-m0 < %s | FileCheck %s
; Cortex-M0 doesn't have 32-bit Thumb2 instructions (except for dmb, mrs, etc.)
; rdar://11331541
define i32 @t(i32 %a) nounwind {
; CHECK: t:
; CHECK: asrs [[REG1:(r[0-9]+)]], [[REG2:(r[0-9]+)]], #31
; CHECK: eors [[REG1]], [[REG2]]
%tmp0 = ashr i32 %a, 31
%tmp1 = xor i32 %tmp0, %a
ret i32 %tmp1
}