llvm-6502/lib/Target/Hexagon/HexagonSelectionDAGInfo.cpp
Andrew Trick ac6d9bec67 Track IR ordering of SelectionDAG nodes 2/4.
Change SelectionDAG::getXXXNode() interfaces as well as call sites of
these functions to pass in SDLoc instead of DebugLoc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182703 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-25 02:42:55 +00:00

47 lines
1.5 KiB
C++

//===-- HexagonSelectionDAGInfo.cpp - Hexagon SelectionDAG Info -----------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file implements the HexagonSelectionDAGInfo class.
//
//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "hexagon-selectiondag-info"
#include "HexagonTargetMachine.h"
using namespace llvm;
bool llvm::flag_aligned_memcpy;
HexagonSelectionDAGInfo::HexagonSelectionDAGInfo(const HexagonTargetMachine
&TM)
: TargetSelectionDAGInfo(TM) {
}
HexagonSelectionDAGInfo::~HexagonSelectionDAGInfo() {
}
SDValue
HexagonSelectionDAGInfo::
EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl, SDValue Chain,
SDValue Dst, SDValue Src, SDValue Size, unsigned Align,
bool isVolatile, bool AlwaysInline,
MachinePointerInfo DstPtrInfo,
MachinePointerInfo SrcPtrInfo) const {
flag_aligned_memcpy = false;
if ((Align & 0x3) == 0) {
ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
if (ConstantSize) {
uint64_t SizeVal = ConstantSize->getZExtValue();
if ((SizeVal > 32) && ((SizeVal % 8) == 0))
flag_aligned_memcpy = true;
}
}
return SDValue();
}