Tom Stellard c1ad37e5cd R600/SI: Add missing test for r187749 ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187754 91177308-0d34-0410-b5e6-96231b3b80d8

2013-08-05 22:45:56 +00:00

..

AArch64

AArch64: add initial NEON support

2013-08-01 09:20:35 +00:00

ARM

Temporarily revert "Debug Info Finder|Verifier: handle DbgLoc attached to

2013-08-02 00:49:44 +00:00

CPP

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Generic

Debug Info: clean up usage of Verify.

2013-06-28 05:43:10 +00:00

Hexagon

Debug Info Verifier: verify SPs in llvm.dbg.sp.

2013-07-27 01:26:08 +00:00

Inputs

Debug Info Verifier: verify SPs in llvm.dbg.sp.

2013-07-27 01:26:08 +00:00

Mips

Add the saving of S2. This is needed for some of the floating point

2013-08-04 23:56:53 +00:00

MSP430

Use conventional syntax for branches.

2013-07-14 18:19:44 +00:00

NVPTX

Add a target legalize hook for SplitVectorOperand (again)

2013-07-26 13:28:29 +00:00

PowerPC

Fix PPC64 64-bit GPR inline asm constraint matching

2013-08-03 12:25:10 +00:00

R600

R600/SI: Add missing test for r187749

2013-08-05 22:45:56 +00:00

SI

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SPARC

Allocate local registers in order for optimal coloring.

2013-07-25 18:35:14 +00:00

SystemZ

[SystemZ] Use BRCT and BRCTG to eliminate add-&-compare sequences

2013-08-05 11:23:46 +00:00

Thumb

Debug Info: update testing cases to pass verifier.

2013-07-29 18:12:58 +00:00

Thumb2

Refactor AnalyzeBranch on ARM. The previous version did not always analyze

2013-07-19 23:52:47 +00:00

X86

AVX-512 set: added mask operations, lowering BUILD_VECTOR for i1 vector types.

2013-08-05 08:52:21 +00:00

XCore

XCore target: Fix Vararg handling

2013-08-01 08:29:44 +00:00