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https://github.com/c64scene-ar/llvm-6502.git
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0e6a052331
to MCRegisterInfo. Also initialize the mapping at construction time. This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step towards fixing the layering violation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135424 91177308-0d34-0410-b5e6-96231b3b80d8
54 lines
1.6 KiB
C++
54 lines
1.6 KiB
C++
//===- PTXRegisterInfo.h - PTX Register Information Impl --------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the PTX implementation of the MRegisterInfo class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef PTX_REGISTER_INFO_H
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#define PTX_REGISTER_INFO_H
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/ADT/BitVector.h"
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#define GET_REGINFO_HEADER
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#include "PTXGenRegisterInfo.inc"
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namespace llvm {
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class PTXTargetMachine;
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class MachineFunction;
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struct PTXRegisterInfo : public PTXGenRegisterInfo {
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PTXRegisterInfo(PTXTargetMachine &TM,
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const TargetInstrInfo &TII);
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virtual const unsigned
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*getCalleeSavedRegs(const MachineFunction *MF = 0) const {
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static const unsigned CalleeSavedRegs[] = { 0 };
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return CalleeSavedRegs; // save nothing
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}
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virtual BitVector getReservedRegs(const MachineFunction &MF) const {
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BitVector Reserved(getNumRegs());
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return Reserved; // reserve no regs
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}
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virtual void eliminateFrameIndex(MachineBasicBlock::iterator II,
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int SPAdj,
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RegScavenger *RS = NULL) const;
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virtual unsigned getFrameRegister(const MachineFunction &MF) const {
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llvm_unreachable("PTX does not have a frame register");
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return 0;
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}
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}; // struct PTXRegisterInfo
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} // namespace llvm
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#endif // PTX_REGISTER_INFO_H
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