llvm-6502/lib/Target/CellSPU
Scott Michel ad2715e0d7 - Fix support for "special" i64 immediates that can be loaded
using IL, ILA, et. al. v2i64 and i64 are now supported by
  the select bits (SELB) instruction.

- Add missing comparison operations (testcase forthcoming)

- More multiclass refactoring.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47973 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-05 23:02:02 +00:00
..
CellSDKIntrinsics.td Merge current work back to tree to minimize diffs and drift. Major highlights 2008-02-23 18:41:37 +00:00
Makefile More cleanups for CellSPU: 2008-01-30 02:55:46 +00:00
README.txt More cleanups for CellSPU: 2008-01-30 02:55:46 +00:00
SPU.h More cleanups for CellSPU: 2008-01-30 02:55:46 +00:00
SPU.td
SPUAsmPrinter.cpp Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries. 2008-02-28 00:43:03 +00:00
SPUCallingConv.td
SPUFrameInfo.cpp
SPUFrameInfo.h Fix newly-introduced 4.3 warnings 2008-02-20 12:07:57 +00:00
SPUHazardRecognizers.cpp
SPUHazardRecognizers.h
SPUInstrBuilder.h
SPUInstrFormats.td Merge current work back to tree to minimize diffs and drift. Major highlights 2008-02-23 18:41:37 +00:00
SPUInstrInfo.cpp Merge current work back to tree to minimize diffs and drift. Major highlights 2008-02-23 18:41:37 +00:00
SPUInstrInfo.h Rename MRegisterInfo to TargetRegisterInfo. 2008-02-10 18:45:23 +00:00
SPUInstrInfo.td - Fix support for "special" i64 immediates that can be loaded 2008-03-05 23:02:02 +00:00
SPUISelDAGToDAG.cpp Merge current work back to tree to minimize diffs and drift. Major highlights 2008-02-23 18:41:37 +00:00
SPUISelLowering.cpp - Fix support for "special" i64 immediates that can be loaded 2008-03-05 23:02:02 +00:00
SPUISelLowering.h Merge current work back to tree to minimize diffs and drift. Major highlights 2008-02-23 18:41:37 +00:00
SPUMachineFunction.h
SPUNodes.td - Fix support for "special" i64 immediates that can be loaded 2008-03-05 23:02:02 +00:00
SPUOperands.td - Fix support for "special" i64 immediates that can be loaded 2008-03-05 23:02:02 +00:00
SPURegisterInfo.cpp Fix newly-introduced 4.3 warnings 2008-02-20 12:07:57 +00:00
SPURegisterInfo.h Fix newly-introduced 4.3 warnings 2008-02-20 12:07:57 +00:00
SPURegisterInfo.td
SPURegisterNames.h
SPUSchedule.td
SPUSubtarget.cpp
SPUSubtarget.h Rewrite tblgen handling of subtarget features so 2008-02-14 23:35:16 +00:00
SPUTargetAsmInfo.cpp Overhaul Cell SPU's addressing mode internals so that there are now 2008-01-29 02:16:57 +00:00
SPUTargetAsmInfo.h
SPUTargetMachine.cpp More cleanups for CellSPU: 2008-01-30 02:55:46 +00:00
SPUTargetMachine.h Rename MRegisterInfo to TargetRegisterInfo. 2008-02-10 18:45:23 +00:00

//===- README.txt - Notes for improving CellSPU-specific code gen ---------===//

This code was contributed by a team from the Computer Systems Research
Department in The Aerospace Corporation:

- Scott Michel (head bottle washer and much of the non-floating point
  instructions)
- Mark Thomas (floating point instructions)
- Michael AuYeung (intrinsics)
- Chandler Carruth (LLVM expertise)

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, NONINFRINGEMENT, OR
OTHERWISE.  IN NO EVENT SHALL THE AEROSPACE CORPORATION BE LIABLE FOR DAMAGES
OF ANY KIND OR NATURE WHETHER BASED IN CONTRACT, TORT, OR OTHERWISE ARISING
OUT OF OR IN CONNECTION WITH THE USE OF THE SOFTWARE INCLUDING, WITHOUT
LIMITATION, DAMAGES RESULTING FROM LOST OR CONTAMINATED DATA, LOST PROFITS OR
REVENUE, COMPUTER MALFUNCTION, OR FOR ANY SPECIAL, INCIDENTAL, CONSEQUENTIAL,
OR PUNITIVE  DAMAGES, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES OR
SUCH DAMAGES ARE FORESEEABLE. 

---------------------------------------------------------------------------
--WARNING--:
--WARNING--: The CellSPU work is work-in-progress and "alpha" quality code.
--WARNING--:

If you are brave enough to try this code or help to hack on it, be sure
to add 'spu' to configure's --enable-targets option, e.g.:

        ./configure <your_configure_flags_here> \
           --enable-targets=x86,x86_64,powerpc,spu

---------------------------------------------------------------------------

TODO:
* Finish branch instructions, branch prediction

  These instructions were started, but only insofar as to get llvm-gcc-4.2's
  crtbegin.ll working (which doesn't.)

* Double floating point support

  This was started. "What's missing?" to be filled in.

* Intrinsics

  Lots of progress. "What's missing/incomplete?" to be filled in.

===-------------------------------------------------------------------------===