llvm-6502/test/CodeGen
Tom Stellard ad52f4f70c R600/SI: Fix implementation of isInlineConstant() used by the verifier
The type of the immediates should not matter as long as the encoding is
equivalent to the encoding of one of the legal inline constants.

Tested-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204056 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-17 17:03:52 +00:00
..
AArch64 IR: add a second ordering operand to cmpxhg for failure 2014-03-11 10:48:52 +00:00
ARM Remove the linker_private and linker_private_weak linkages. 2014-03-13 23:18:37 +00:00
CPP
Generic
Hexagon
Inputs
Mips [mips] BSEL's and BINS[RL] operands are reversed compared to the vselect node used in the pattern. 2014-03-12 11:54:00 +00:00
MSP430
NVPTX Remove the linker_private and linker_private_weak linkages. 2014-03-13 23:18:37 +00:00
PowerPC [ppc64] Avoid copy relocs in named rodata sections 2014-03-14 12:45:22 +00:00
R600 R600/SI: Fix implementation of isInlineConstant() used by the verifier 2014-03-17 17:03:52 +00:00
SPARC Remove the linker_private and linker_private_weak linkages. 2014-03-13 23:18:37 +00:00
SystemZ IR: add a second ordering operand to cmpxhg for failure 2014-03-11 10:48:52 +00:00
Thumb
Thumb2
X86 [X86] New and improved VZeroUpperInserter optimization. 2014-03-17 01:22:54 +00:00
XCore