mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-05 13:29:22 +00:00
bb25a01d23
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189980 91177308-0d34-0410-b5e6-96231b3b80d8
162 lines
5.0 KiB
LLVM
162 lines
5.0 KiB
LLVM
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
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; These tests check that floating point comparisons which are used by select
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; to store integer true (-1) and false (0) values are lowered to one of the
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; SET*DX10 instructions.
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; CHECK: @fcmp_une_select_fptosi
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; CHECK: SETNE_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z, literal.x,
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; CHECK-NEXT: LSHR
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; CHECK-NEXT: 1084227584(5.000000e+00)
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define void @fcmp_une_select_fptosi(i32 addrspace(1)* %out, float %in) {
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entry:
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%0 = fcmp une float %in, 5.0
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%1 = select i1 %0, float 1.000000e+00, float 0.000000e+00
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%2 = fsub float -0.000000e+00, %1
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%3 = fptosi float %2 to i32
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store i32 %3, i32 addrspace(1)* %out
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ret void
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}
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; CHECK: @fcmp_une_select_i32
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; CHECK: SETNE_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z, literal.x,
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; CHECK-NEXT: LSHR
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; CHECK-NEXT: 1084227584(5.000000e+00)
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define void @fcmp_une_select_i32(i32 addrspace(1)* %out, float %in) {
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entry:
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%0 = fcmp une float %in, 5.0
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%1 = select i1 %0, i32 -1, i32 0
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; CHECK: @fcmp_ueq_select_fptosi
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; CHECK: SETE_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z, literal.x,
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; CHECK-NEXT: LSHR
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; CHECK-NEXT: 1084227584(5.000000e+00)
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define void @fcmp_ueq_select_fptosi(i32 addrspace(1)* %out, float %in) {
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entry:
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%0 = fcmp ueq float %in, 5.0
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%1 = select i1 %0, float 1.000000e+00, float 0.000000e+00
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%2 = fsub float -0.000000e+00, %1
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%3 = fptosi float %2 to i32
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store i32 %3, i32 addrspace(1)* %out
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ret void
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}
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; CHECK: @fcmp_ueq_select_i32
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; CHECK: SETE_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z, literal.x,
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; CHECK-NEXT: LSHR
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; CHECK-NEXT: 1084227584(5.000000e+00)
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define void @fcmp_ueq_select_i32(i32 addrspace(1)* %out, float %in) {
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entry:
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%0 = fcmp ueq float %in, 5.0
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%1 = select i1 %0, i32 -1, i32 0
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; CHECK: @fcmp_ugt_select_fptosi
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; CHECK: SETGT_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z, literal.x,
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; CHECK-NEXT: LSHR
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; CHECK-NEXT: 1084227584(5.000000e+00)
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define void @fcmp_ugt_select_fptosi(i32 addrspace(1)* %out, float %in) {
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entry:
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%0 = fcmp ugt float %in, 5.0
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%1 = select i1 %0, float 1.000000e+00, float 0.000000e+00
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%2 = fsub float -0.000000e+00, %1
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%3 = fptosi float %2 to i32
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store i32 %3, i32 addrspace(1)* %out
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ret void
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}
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; CHECK: @fcmp_ugt_select_i32
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; CHECK: SETGT_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z, literal.x,
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; CHECK-NEXT: LSHR
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; CHECK-NEXT: 1084227584(5.000000e+00)
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define void @fcmp_ugt_select_i32(i32 addrspace(1)* %out, float %in) {
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entry:
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%0 = fcmp ugt float %in, 5.0
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%1 = select i1 %0, i32 -1, i32 0
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; CHECK: @fcmp_uge_select_fptosi
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; CHECK: SETGE_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z, literal.x,
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; CHECK-NEXT: LSHR
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; CHECK-NEXT: 1084227584(5.000000e+00)
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define void @fcmp_uge_select_fptosi(i32 addrspace(1)* %out, float %in) {
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entry:
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%0 = fcmp uge float %in, 5.0
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%1 = select i1 %0, float 1.000000e+00, float 0.000000e+00
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%2 = fsub float -0.000000e+00, %1
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%3 = fptosi float %2 to i32
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store i32 %3, i32 addrspace(1)* %out
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ret void
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}
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; CHECK: @fcmp_uge_select_i32
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; CHECK: SETGE_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z, literal.x,
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; CHECK-NEXT: LSHR
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; CHECK-NEXT: 1084227584(5.000000e+00)
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define void @fcmp_uge_select_i32(i32 addrspace(1)* %out, float %in) {
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entry:
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%0 = fcmp uge float %in, 5.0
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%1 = select i1 %0, i32 -1, i32 0
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; CHECK: @fcmp_ule_select_fptosi
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; CHECK: SETGE_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, literal.x, KC0[2].Z,
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; CHECK-NEXT: LSHR
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; CHECK-NEXT: 1084227584(5.000000e+00)
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define void @fcmp_ule_select_fptosi(i32 addrspace(1)* %out, float %in) {
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entry:
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%0 = fcmp ule float %in, 5.0
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%1 = select i1 %0, float 1.000000e+00, float 0.000000e+00
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%2 = fsub float -0.000000e+00, %1
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%3 = fptosi float %2 to i32
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store i32 %3, i32 addrspace(1)* %out
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ret void
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}
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; CHECK: @fcmp_ule_select_i32
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; CHECK: SETGE_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, literal.x, KC0[2].Z,
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; CHECK-NEXT: LSHR
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; CHECK-NEXT: 1084227584(5.000000e+00)
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define void @fcmp_ule_select_i32(i32 addrspace(1)* %out, float %in) {
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entry:
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%0 = fcmp ule float %in, 5.0
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%1 = select i1 %0, i32 -1, i32 0
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; CHECK: @fcmp_ult_select_fptosi
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; CHECK: SETGT_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, literal.x, KC0[2].Z,
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; CHECK-NEXT: LSHR
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; CHECK-NEXT: 1084227584(5.000000e+00)
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define void @fcmp_ult_select_fptosi(i32 addrspace(1)* %out, float %in) {
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entry:
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%0 = fcmp ult float %in, 5.0
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%1 = select i1 %0, float 1.000000e+00, float 0.000000e+00
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%2 = fsub float -0.000000e+00, %1
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%3 = fptosi float %2 to i32
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store i32 %3, i32 addrspace(1)* %out
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ret void
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}
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; CHECK: @fcmp_ult_select_i32
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; CHECK: SETGT_DX10 {{\** *}}T{{[0-9]+\.[XYZW]}}, literal.x, KC0[2].Z,
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; CHECK-NEXT: LSHR
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; CHECK-NEXT: 1084227584(5.000000e+00)
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define void @fcmp_ult_select_i32(i32 addrspace(1)* %out, float %in) {
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entry:
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%0 = fcmp ult float %in, 5.0
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%1 = select i1 %0, i32 -1, i32 0
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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