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https://github.com/c64scene-ar/llvm-6502.git
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e5609f3732
Previously LEA64_32r went through virtually the entire backend thinking it was using 32-bit registers until its blissful illusions were cruelly snatched away by MCInstLower and 64-bit equivalents were substituted at the last minute. This patch makes it behave normally, and take 64-bit registers as sources all the way through. Previous uses (for 32-bit arithmetic) are accommodated via SUBREG_TO_REG instructions which make the types and classes agree properly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183693 91177308-0d34-0410-b5e6-96231b3b80d8
37 lines
840 B
LLVM
37 lines
840 B
LLVM
; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
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; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s
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define i32 @test1(i32 %x) nounwind {
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%tmp1 = shl i32 %x, 3
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%tmp2 = add i32 %tmp1, 7
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ret i32 %tmp2
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; CHECK: test1:
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; CHECK: leal 7(,%r[[A0:di|cx]],8), %eax
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}
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; ISel the add of -4 with a neg and use an lea for the rest of the
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; arithemtic.
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define i32 @test2(i32 %x_offs) nounwind readnone {
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entry:
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%t0 = icmp sgt i32 %x_offs, 4
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br i1 %t0, label %bb.nph, label %bb2
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bb.nph:
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%tmp = add i32 %x_offs, -5
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%tmp6 = lshr i32 %tmp, 2
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%tmp7 = mul i32 %tmp6, -4
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%tmp8 = add i32 %tmp7, %x_offs
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%tmp9 = add i32 %tmp8, -4
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ret i32 %tmp9
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bb2:
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ret i32 %x_offs
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; CHECK: test2:
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; CHECK: movl %e[[A0]], %eax
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; CHECK: addl $-5, %eax
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; CHECK: andl $-4, %eax
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; CHECK: negl %eax
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; CHECK: leal -4(%r[[A0]],%rax), %eax
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}
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