mirror of
https://github.com/c64scene-ar/llvm-6502.git
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207511 91177308-0d34-0410-b5e6-96231b3b80d8
470 lines
16 KiB
C++
470 lines
16 KiB
C++
//===-- SystemZElimCompare.cpp - Eliminate comparison instructions --------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass:
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// (1) tries to remove compares if CC already contains the required information
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// (2) fuses compares and branches into COMPARE AND BRANCH instructions
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//
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//===----------------------------------------------------------------------===//
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#include "SystemZTargetMachine.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/IR/Function.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/MathExtras.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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using namespace llvm;
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#define DEBUG_TYPE "systemz-elim-compare"
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STATISTIC(BranchOnCounts, "Number of branch-on-count instructions");
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STATISTIC(EliminatedComparisons, "Number of eliminated comparisons");
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STATISTIC(FusedComparisons, "Number of fused compare-and-branch instructions");
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namespace {
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// Represents the references to a particular register in one or more
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// instructions.
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struct Reference {
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Reference()
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: Def(false), Use(false), IndirectDef(false), IndirectUse(false) {}
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Reference &operator|=(const Reference &Other) {
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Def |= Other.Def;
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IndirectDef |= Other.IndirectDef;
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Use |= Other.Use;
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IndirectUse |= Other.IndirectUse;
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return *this;
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}
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operator bool() const { return Def || Use; }
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// True if the register is defined or used in some form, either directly or
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// via a sub- or super-register.
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bool Def;
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bool Use;
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// True if the register is defined or used indirectly, by a sub- or
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// super-register.
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bool IndirectDef;
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bool IndirectUse;
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};
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class SystemZElimCompare : public MachineFunctionPass {
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public:
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static char ID;
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SystemZElimCompare(const SystemZTargetMachine &tm)
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: MachineFunctionPass(ID), TII(nullptr), TRI(nullptr) {}
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const char *getPassName() const override {
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return "SystemZ Comparison Elimination";
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}
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bool processBlock(MachineBasicBlock &MBB);
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bool runOnMachineFunction(MachineFunction &F) override;
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private:
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Reference getRegReferences(MachineInstr *MI, unsigned Reg);
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bool convertToBRCT(MachineInstr *MI, MachineInstr *Compare,
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SmallVectorImpl<MachineInstr *> &CCUsers);
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bool convertToLoadAndTest(MachineInstr *MI);
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bool adjustCCMasksForInstr(MachineInstr *MI, MachineInstr *Compare,
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SmallVectorImpl<MachineInstr *> &CCUsers);
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bool optimizeCompareZero(MachineInstr *Compare,
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SmallVectorImpl<MachineInstr *> &CCUsers);
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bool fuseCompareAndBranch(MachineInstr *Compare,
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SmallVectorImpl<MachineInstr *> &CCUsers);
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const SystemZInstrInfo *TII;
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const TargetRegisterInfo *TRI;
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};
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char SystemZElimCompare::ID = 0;
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} // end anonymous namespace
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FunctionPass *llvm::createSystemZElimComparePass(SystemZTargetMachine &TM) {
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return new SystemZElimCompare(TM);
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}
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// Return true if CC is live out of MBB.
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static bool isCCLiveOut(MachineBasicBlock &MBB) {
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for (auto SI = MBB.succ_begin(), SE = MBB.succ_end(); SI != SE; ++SI)
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if ((*SI)->isLiveIn(SystemZ::CC))
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return true;
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return false;
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}
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// Return true if any CC result of MI would reflect the value of subreg
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// SubReg of Reg.
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static bool resultTests(MachineInstr *MI, unsigned Reg, unsigned SubReg) {
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if (MI->getNumOperands() > 0 &&
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MI->getOperand(0).isReg() &&
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MI->getOperand(0).isDef() &&
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MI->getOperand(0).getReg() == Reg &&
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MI->getOperand(0).getSubReg() == SubReg)
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return true;
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switch (MI->getOpcode()) {
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case SystemZ::LR:
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case SystemZ::LGR:
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case SystemZ::LGFR:
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case SystemZ::LTR:
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case SystemZ::LTGR:
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case SystemZ::LTGFR:
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case SystemZ::LER:
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case SystemZ::LDR:
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case SystemZ::LXR:
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case SystemZ::LTEBR:
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case SystemZ::LTDBR:
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case SystemZ::LTXBR:
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if (MI->getOperand(1).getReg() == Reg &&
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MI->getOperand(1).getSubReg() == SubReg)
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return true;
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}
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return false;
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}
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// Describe the references to Reg in MI, including sub- and super-registers.
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Reference SystemZElimCompare::getRegReferences(MachineInstr *MI, unsigned Reg) {
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Reference Ref;
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for (unsigned I = 0, E = MI->getNumOperands(); I != E; ++I) {
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const MachineOperand &MO = MI->getOperand(I);
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if (MO.isReg()) {
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if (unsigned MOReg = MO.getReg()) {
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if (MOReg == Reg || TRI->regsOverlap(MOReg, Reg)) {
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if (MO.isUse()) {
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Ref.Use = true;
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Ref.IndirectUse |= (MOReg != Reg);
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}
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if (MO.isDef()) {
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Ref.Def = true;
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Ref.IndirectDef |= (MOReg != Reg);
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}
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}
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}
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}
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}
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return Ref;
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}
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// Compare compares the result of MI against zero. If MI is an addition
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// of -1 and if CCUsers is a single branch on nonzero, eliminate the addition
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// and convert the branch to a BRCT(G). Return true on success.
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bool
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SystemZElimCompare::convertToBRCT(MachineInstr *MI, MachineInstr *Compare,
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SmallVectorImpl<MachineInstr *> &CCUsers) {
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// Check whether we have an addition of -1.
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unsigned Opcode = MI->getOpcode();
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unsigned BRCT;
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if (Opcode == SystemZ::AHI)
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BRCT = SystemZ::BRCT;
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else if (Opcode == SystemZ::AGHI)
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BRCT = SystemZ::BRCTG;
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else
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return false;
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if (MI->getOperand(2).getImm() != -1)
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return false;
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// Check whether we have a single JLH.
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if (CCUsers.size() != 1)
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return false;
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MachineInstr *Branch = CCUsers[0];
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if (Branch->getOpcode() != SystemZ::BRC ||
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Branch->getOperand(0).getImm() != SystemZ::CCMASK_ICMP ||
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Branch->getOperand(1).getImm() != SystemZ::CCMASK_CMP_NE)
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return false;
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// We already know that there are no references to the register between
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// MI and Compare. Make sure that there are also no references between
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// Compare and Branch.
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unsigned SrcReg = Compare->getOperand(0).getReg();
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MachineBasicBlock::iterator MBBI = Compare, MBBE = Branch;
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for (++MBBI; MBBI != MBBE; ++MBBI)
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if (getRegReferences(MBBI, SrcReg))
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return false;
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// The transformation is OK. Rebuild Branch as a BRCT(G).
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MachineOperand Target(Branch->getOperand(2));
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Branch->RemoveOperand(2);
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Branch->RemoveOperand(1);
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Branch->RemoveOperand(0);
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Branch->setDesc(TII->get(BRCT));
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MachineInstrBuilder(*Branch->getParent()->getParent(), Branch)
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.addOperand(MI->getOperand(0))
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.addOperand(MI->getOperand(1))
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.addOperand(Target)
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.addReg(SystemZ::CC, RegState::ImplicitDefine);
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MI->removeFromParent();
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return true;
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}
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// If MI is a load instruction, try to convert it into a LOAD AND TEST.
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// Return true on success.
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bool SystemZElimCompare::convertToLoadAndTest(MachineInstr *MI) {
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unsigned Opcode = TII->getLoadAndTest(MI->getOpcode());
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if (!Opcode)
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return false;
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MI->setDesc(TII->get(Opcode));
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MachineInstrBuilder(*MI->getParent()->getParent(), MI)
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.addReg(SystemZ::CC, RegState::ImplicitDefine);
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return true;
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}
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// The CC users in CCUsers are testing the result of a comparison of some
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// value X against zero and we know that any CC value produced by MI
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// would also reflect the value of X. Try to adjust CCUsers so that
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// they test the result of MI directly, returning true on success.
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// Leave everything unchanged on failure.
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bool SystemZElimCompare::
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adjustCCMasksForInstr(MachineInstr *MI, MachineInstr *Compare,
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SmallVectorImpl<MachineInstr *> &CCUsers) {
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int Opcode = MI->getOpcode();
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const MCInstrDesc &Desc = TII->get(Opcode);
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unsigned MIFlags = Desc.TSFlags;
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// See which compare-style condition codes are available.
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unsigned ReusableCCMask = SystemZII::getCompareZeroCCMask(MIFlags);
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// For unsigned comparisons with zero, only equality makes sense.
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unsigned CompareFlags = Compare->getDesc().TSFlags;
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if (CompareFlags & SystemZII::IsLogical)
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ReusableCCMask &= SystemZ::CCMASK_CMP_EQ;
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if (ReusableCCMask == 0)
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return false;
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unsigned CCValues = SystemZII::getCCValues(MIFlags);
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assert((ReusableCCMask & ~CCValues) == 0 && "Invalid CCValues");
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// Now check whether these flags are enough for all users.
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SmallVector<MachineOperand *, 4> AlterMasks;
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for (unsigned int I = 0, E = CCUsers.size(); I != E; ++I) {
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MachineInstr *MI = CCUsers[I];
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// Fail if this isn't a use of CC that we understand.
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unsigned Flags = MI->getDesc().TSFlags;
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unsigned FirstOpNum;
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if (Flags & SystemZII::CCMaskFirst)
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FirstOpNum = 0;
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else if (Flags & SystemZII::CCMaskLast)
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FirstOpNum = MI->getNumExplicitOperands() - 2;
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else
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return false;
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// Check whether the instruction predicate treats all CC values
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// outside of ReusableCCMask in the same way. In that case it
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// doesn't matter what those CC values mean.
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unsigned CCValid = MI->getOperand(FirstOpNum).getImm();
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unsigned CCMask = MI->getOperand(FirstOpNum + 1).getImm();
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unsigned OutValid = ~ReusableCCMask & CCValid;
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unsigned OutMask = ~ReusableCCMask & CCMask;
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if (OutMask != 0 && OutMask != OutValid)
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return false;
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AlterMasks.push_back(&MI->getOperand(FirstOpNum));
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AlterMasks.push_back(&MI->getOperand(FirstOpNum + 1));
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}
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// All users are OK. Adjust the masks for MI.
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for (unsigned I = 0, E = AlterMasks.size(); I != E; I += 2) {
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AlterMasks[I]->setImm(CCValues);
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unsigned CCMask = AlterMasks[I + 1]->getImm();
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if (CCMask & ~ReusableCCMask)
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AlterMasks[I + 1]->setImm((CCMask & ReusableCCMask) |
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(CCValues & ~ReusableCCMask));
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}
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// CC is now live after MI.
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int CCDef = MI->findRegisterDefOperandIdx(SystemZ::CC, false, true, TRI);
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assert(CCDef >= 0 && "Couldn't find CC set");
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MI->getOperand(CCDef).setIsDead(false);
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// Clear any intervening kills of CC.
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MachineBasicBlock::iterator MBBI = MI, MBBE = Compare;
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for (++MBBI; MBBI != MBBE; ++MBBI)
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MBBI->clearRegisterKills(SystemZ::CC, TRI);
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return true;
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}
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// Return true if Compare is a comparison against zero.
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static bool isCompareZero(MachineInstr *Compare) {
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switch (Compare->getOpcode()) {
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case SystemZ::LTEBRCompare:
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case SystemZ::LTDBRCompare:
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case SystemZ::LTXBRCompare:
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return true;
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default:
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return (Compare->getNumExplicitOperands() == 2 &&
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Compare->getOperand(1).isImm() &&
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Compare->getOperand(1).getImm() == 0);
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}
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}
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// Try to optimize cases where comparison instruction Compare is testing
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// a value against zero. Return true on success and if Compare should be
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// deleted as dead. CCUsers is the list of instructions that use the CC
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// value produced by Compare.
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bool SystemZElimCompare::
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optimizeCompareZero(MachineInstr *Compare,
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SmallVectorImpl<MachineInstr *> &CCUsers) {
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if (!isCompareZero(Compare))
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return false;
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// Search back for CC results that are based on the first operand.
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unsigned SrcReg = Compare->getOperand(0).getReg();
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unsigned SrcSubReg = Compare->getOperand(0).getSubReg();
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MachineBasicBlock &MBB = *Compare->getParent();
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MachineBasicBlock::iterator MBBI = Compare, MBBE = MBB.begin();
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Reference CCRefs;
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Reference SrcRefs;
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while (MBBI != MBBE) {
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--MBBI;
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MachineInstr *MI = MBBI;
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if (resultTests(MI, SrcReg, SrcSubReg)) {
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// Try to remove both MI and Compare by converting a branch to BRCT(G).
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// We don't care in this case whether CC is modified between MI and
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// Compare.
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if (!CCRefs.Use && !SrcRefs && convertToBRCT(MI, Compare, CCUsers)) {
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BranchOnCounts += 1;
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return true;
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}
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// Try to eliminate Compare by reusing a CC result from MI.
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if ((!CCRefs && convertToLoadAndTest(MI)) ||
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(!CCRefs.Def && adjustCCMasksForInstr(MI, Compare, CCUsers))) {
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EliminatedComparisons += 1;
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return true;
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}
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}
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SrcRefs |= getRegReferences(MI, SrcReg);
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if (SrcRefs.Def)
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return false;
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CCRefs |= getRegReferences(MI, SystemZ::CC);
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if (CCRefs.Use && CCRefs.Def)
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return false;
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}
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return false;
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}
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// Try to fuse comparison instruction Compare into a later branch.
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// Return true on success and if Compare is therefore redundant.
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bool SystemZElimCompare::
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fuseCompareAndBranch(MachineInstr *Compare,
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SmallVectorImpl<MachineInstr *> &CCUsers) {
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// See whether we have a comparison that can be fused.
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unsigned FusedOpcode = TII->getCompareAndBranch(Compare->getOpcode(),
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Compare);
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if (!FusedOpcode)
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return false;
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// See whether we have a single branch with which to fuse.
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if (CCUsers.size() != 1)
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return false;
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MachineInstr *Branch = CCUsers[0];
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if (Branch->getOpcode() != SystemZ::BRC)
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return false;
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// Make sure that the operands are available at the branch.
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unsigned SrcReg = Compare->getOperand(0).getReg();
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unsigned SrcReg2 = (Compare->getOperand(1).isReg() ?
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Compare->getOperand(1).getReg() : 0);
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MachineBasicBlock::iterator MBBI = Compare, MBBE = Branch;
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for (++MBBI; MBBI != MBBE; ++MBBI)
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if (MBBI->modifiesRegister(SrcReg, TRI) ||
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(SrcReg2 && MBBI->modifiesRegister(SrcReg2, TRI)))
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return false;
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// Read the branch mask and target.
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MachineOperand CCMask(MBBI->getOperand(1));
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MachineOperand Target(MBBI->getOperand(2));
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assert((CCMask.getImm() & ~SystemZ::CCMASK_ICMP) == 0 &&
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"Invalid condition-code mask for integer comparison");
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// Clear out all current operands.
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int CCUse = MBBI->findRegisterUseOperandIdx(SystemZ::CC, false, TRI);
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assert(CCUse >= 0 && "BRC must use CC");
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Branch->RemoveOperand(CCUse);
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Branch->RemoveOperand(2);
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Branch->RemoveOperand(1);
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Branch->RemoveOperand(0);
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// Rebuild Branch as a fused compare and branch.
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Branch->setDesc(TII->get(FusedOpcode));
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MachineInstrBuilder(*Branch->getParent()->getParent(), Branch)
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.addOperand(Compare->getOperand(0))
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.addOperand(Compare->getOperand(1))
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.addOperand(CCMask)
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.addOperand(Target)
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.addReg(SystemZ::CC, RegState::ImplicitDefine);
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// Clear any intervening kills of SrcReg and SrcReg2.
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MBBI = Compare;
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for (++MBBI; MBBI != MBBE; ++MBBI) {
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MBBI->clearRegisterKills(SrcReg, TRI);
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if (SrcReg2)
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MBBI->clearRegisterKills(SrcReg2, TRI);
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}
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FusedComparisons += 1;
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return true;
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}
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// Process all comparison instructions in MBB. Return true if something
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// changed.
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bool SystemZElimCompare::processBlock(MachineBasicBlock &MBB) {
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bool Changed = false;
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// Walk backwards through the block looking for comparisons, recording
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// all CC users as we go. The subroutines can delete Compare and
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// instructions before it.
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bool CompleteCCUsers = !isCCLiveOut(MBB);
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SmallVector<MachineInstr *, 4> CCUsers;
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MachineBasicBlock::iterator MBBI = MBB.end();
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while (MBBI != MBB.begin()) {
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MachineInstr *MI = --MBBI;
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if (CompleteCCUsers &&
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MI->isCompare() &&
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(optimizeCompareZero(MI, CCUsers) ||
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fuseCompareAndBranch(MI, CCUsers))) {
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++MBBI;
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MI->removeFromParent();
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Changed = true;
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CCUsers.clear();
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CompleteCCUsers = true;
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continue;
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}
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Reference CCRefs(getRegReferences(MI, SystemZ::CC));
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if (CCRefs.Def) {
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CCUsers.clear();
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CompleteCCUsers = !CCRefs.IndirectDef;
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}
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if (CompleteCCUsers && CCRefs.Use)
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CCUsers.push_back(MI);
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}
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return Changed;
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}
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bool SystemZElimCompare::runOnMachineFunction(MachineFunction &F) {
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TII = static_cast<const SystemZInstrInfo *>(F.getTarget().getInstrInfo());
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TRI = &TII->getRegisterInfo();
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bool Changed = false;
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for (auto &MBB : F)
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Changed |= processBlock(MBB);
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return Changed;
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}
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