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https://github.com/c64scene-ar/llvm-6502.git
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1f996fa36b
This is equivalent to the AMDGPUTargetMachine now, but it is the starting point for separating R600 and GCN functionality into separate targets. It is recommened that users start using the gcn triple for GCN-based GPUs, because using the r600 triple for these GPUs will be deprecated in the future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225277 91177308-0d34-0410-b5e6-96231b3b80d8
100 lines
3.7 KiB
LLVM
100 lines
3.7 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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declare i32 @llvm.r600.read.tidig.x() nounwind readnone
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; FUNC-LABEL: @v_test_imax_sge_i32
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; SI: v_max_i32_e32
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define void @v_test_imax_sge_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %aptr, i32 addrspace(1)* %bptr) nounwind {
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%tid = call i32 @llvm.r600.read.tidig.x() nounwind readnone
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%gep0 = getelementptr i32 addrspace(1)* %aptr, i32 %tid
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%gep1 = getelementptr i32 addrspace(1)* %bptr, i32 %tid
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%outgep = getelementptr i32 addrspace(1)* %out, i32 %tid
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%a = load i32 addrspace(1)* %gep0, align 4
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%b = load i32 addrspace(1)* %gep1, align 4
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%cmp = icmp sge i32 %a, %b
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%val = select i1 %cmp, i32 %a, i32 %b
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store i32 %val, i32 addrspace(1)* %outgep, align 4
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ret void
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}
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; FUNC-LABEL: @s_test_imax_sge_i32
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; SI: s_max_i32
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define void @s_test_imax_sge_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
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%cmp = icmp sge i32 %a, %b
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%val = select i1 %cmp, i32 %a, i32 %b
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store i32 %val, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @v_test_imax_sgt_i32
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; SI: v_max_i32_e32
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define void @v_test_imax_sgt_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %aptr, i32 addrspace(1)* %bptr) nounwind {
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%tid = call i32 @llvm.r600.read.tidig.x() nounwind readnone
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%gep0 = getelementptr i32 addrspace(1)* %aptr, i32 %tid
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%gep1 = getelementptr i32 addrspace(1)* %bptr, i32 %tid
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%outgep = getelementptr i32 addrspace(1)* %out, i32 %tid
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%a = load i32 addrspace(1)* %gep0, align 4
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%b = load i32 addrspace(1)* %gep1, align 4
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%cmp = icmp sgt i32 %a, %b
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%val = select i1 %cmp, i32 %a, i32 %b
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store i32 %val, i32 addrspace(1)* %outgep, align 4
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ret void
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}
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; FUNC-LABEL: @s_test_imax_sgt_i32
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; SI: s_max_i32
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define void @s_test_imax_sgt_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
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%cmp = icmp sgt i32 %a, %b
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%val = select i1 %cmp, i32 %a, i32 %b
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store i32 %val, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @v_test_umax_uge_i32
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; SI: v_max_u32_e32
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define void @v_test_umax_uge_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %aptr, i32 addrspace(1)* %bptr) nounwind {
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%tid = call i32 @llvm.r600.read.tidig.x() nounwind readnone
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%gep0 = getelementptr i32 addrspace(1)* %aptr, i32 %tid
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%gep1 = getelementptr i32 addrspace(1)* %bptr, i32 %tid
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%outgep = getelementptr i32 addrspace(1)* %out, i32 %tid
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%a = load i32 addrspace(1)* %gep0, align 4
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%b = load i32 addrspace(1)* %gep1, align 4
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%cmp = icmp uge i32 %a, %b
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%val = select i1 %cmp, i32 %a, i32 %b
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store i32 %val, i32 addrspace(1)* %outgep, align 4
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ret void
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}
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; FUNC-LABEL: @s_test_umax_uge_i32
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; SI: s_max_u32
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define void @s_test_umax_uge_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
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%cmp = icmp uge i32 %a, %b
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%val = select i1 %cmp, i32 %a, i32 %b
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store i32 %val, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @v_test_umax_ugt_i32
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; SI: v_max_u32_e32
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define void @v_test_umax_ugt_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %aptr, i32 addrspace(1)* %bptr) nounwind {
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%tid = call i32 @llvm.r600.read.tidig.x() nounwind readnone
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%gep0 = getelementptr i32 addrspace(1)* %aptr, i32 %tid
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%gep1 = getelementptr i32 addrspace(1)* %bptr, i32 %tid
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%outgep = getelementptr i32 addrspace(1)* %out, i32 %tid
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%a = load i32 addrspace(1)* %gep0, align 4
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%b = load i32 addrspace(1)* %gep1, align 4
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%cmp = icmp ugt i32 %a, %b
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%val = select i1 %cmp, i32 %a, i32 %b
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store i32 %val, i32 addrspace(1)* %outgep, align 4
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ret void
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}
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; FUNC-LABEL: @s_test_umax_ugt_i32
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; SI: s_max_u32
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define void @s_test_umax_ugt_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
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%cmp = icmp ugt i32 %a, %b
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%val = select i1 %cmp, i32 %a, i32 %b
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store i32 %val, i32 addrspace(1)* %out, align 4
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ret void
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}
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