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b3aa319401
what value type it is. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7356 91177308-0d34-0410-b5e6-96231b3b80d8
42 lines
1.6 KiB
C++
42 lines
1.6 KiB
C++
//===- Sparc.td - Target Description for Sparc V9 Target --------*- C++ -*-===//
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// vim:ft=cpp
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Target-Independent interface
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//===----------------------------------------------------------------------===//
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// Value types - These values correspond to the register types defined in the
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// MRegsterInfo.h file.
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class ValueType {}
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def i1 : ValueType; // One bit boolean value
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def i8 : ValueType; // 8-bit integer value
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def i16 : ValueType; // 16-bit integer value
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def i32 : ValueType; // 32-bit integer value
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def i64 : ValueType; // 64-bit integer value
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def i128 : ValueType; // 128-bit integer value
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def f32 : ValueType; // 32-bit floating point value
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def f64 : ValueType; // 64-bit floating point value
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def f80 : ValueType; // 80-bit floating point value
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def f128 : ValueType; // 128-bit floating point value
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class Register {
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string Namespace = "";
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ValueType RegType;
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}
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class Instruction {
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string Name; // The opcode string for this instruction
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string Namespace = "";
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list<Register> Uses = []; // Default to using no non-operand registers
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list<Register> Defs = []; // Default to modifying no non-operand registers
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// These bits capture information about the high-level semantics of the
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// instruction.
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bit isReturn = 0; // Is this instruction a return instruction?
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bit isBranch = 0; // Is this instruction a branch instruction?
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bit isCall = 0; // Is this instruction a call instruction?
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}
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