Tim Northover adadf887cb X86: FrameIndex addressing modes do have a base register. ... When selecting the DAG (add (WrapperRIP ...), (FrameIndex ...)), X86 code had spotted the FrameIndex possibility and was working out whether it could fold the WrapperRIP into this. The test for forming a %rip version is notionally whether we already have a base or index register (%rip precludes both), but we were forgetting to account for the register that would be inserted later to access the frame. rdar://problem/15024520 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190995 91177308-0d34-0410-b5e6-96231b3b80d8		2013-09-19 11:33:53 +00:00
..
Analysis	Costmodel: Add support for horizontal vector reductions	2013-09-17 18:06:50 +00:00
Assembler
Bindings/Ocaml
Bitcode
BugPoint
CodeGen	X86: FrameIndex addressing modes do have a base register.	2013-09-19 11:33:53 +00:00
DebugInfo	Debug info: Get rid of the VLA indirection hack in FastISel.	2013-09-18 22:08:59 +00:00
ExecutionEngine
Feature	Implement function prefix data as an IR feature.	2013-09-16 01:08:15 +00:00
FileCheck
Instrumentation	[msan] Check return value of main().	2013-09-16 13:24:32 +00:00
Integer
JitListener
Linker	Implement function prefix data as an IR feature.	2013-09-16 01:08:15 +00:00
MC	[SystemZ] Add unsigned compare-and-branch instructions	2013-09-18 09:56:40 +00:00
Object
Other
TableGen
tools
Transforms	Name the XCore target-specific subdirectories canonically.	2013-09-18 14:08:30 +00:00
Unit
Verifier
YAMLParser
CMakeLists.txt
lit.cfg
lit.site.cfg.in
Makefile
Makefile.tests
TestRunner.sh